S
Stefano Rinaldi
Researcher at University of Brescia
Publications - 204
Citations - 2885
Stefano Rinaldi is an academic researcher from University of Brescia. The author has contributed to research in topics: Smart grid & Synchronization. The author has an hindex of 27, co-authored 177 publications receiving 2216 citations. Previous affiliations of Stefano Rinaldi include Brescia University.
Papers
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Proceedings ArticleDOI
On the feasibility of mobile sensing and tracking applications based on LPWAN
D. Fernandes Carvalho,Alessandro Depari,Paolo Ferrari,Alessandra Flammini,Stefano Rinaldi,Emiliano Sisinni +5 more
TL;DR: This paper evaluates performance of a real world LoRaWAN application in a large area (several km2), considering node mobility as well, and results confirm the capability of Lo RaWAN to cope with low speed applications.
Proceedings ArticleDOI
Synchronization of the Probes of a Distributed Instrument for Real-Time Ethernet Networks
TL;DR: This work deals with distributed, multi-probe, instrument for performance analysis of Real-Time Ethernet (RTE) network and focuses on synchronization techniques for distributed measurements.
Synchronization oftheProbes ofaDistributed Instrument forReal-Time Ethernet Networks
TL;DR: In this paper, a distributed, multi-probe, instrument for performance analysis of real-time Ethernet (RTE) network is presented, where three synchronization techniques have been implemented and experimental results are reported.
Proceedings ArticleDOI
Software defined networking applied to the heterogeneous infrastructure of Smart Grid
TL;DR: A Software Defined Networking approach has been proposed to manage SG communication system applied to grid monitoring/supervision, and the preliminary feasibility analysis is promising, although a more detailed modeling and analysis of the system is needed due to the extreme heterogeneity of the network.
Proceedings ArticleDOI
White rabbit clock characteristics
Mattia Rizzi,Maciej Lipinski,T Wlostowski,J. Serrano,Grzegorz Daniluk,Paolo Ferrari,Stefano Rinaldi +6 more
TL;DR: The interaction between L1 syntonisation and PTP synchronisation in a WR device and the architecture of its Phase-Locked Loop (PLL) are explained and improvements that might be useful for different types of WR applications are proposed.