An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

The recent progress in ferroelectricity and antiferroelectricity in HfO2-based thin films is reported. Most ferroelectric thin film research focuses on perovskite structure materials, such as Pb(Zr,Ti)O3, BaTiO3, and SrBi2Ta2O9, which are considered to be feasible candidate materials for non-volatile semiconductor memory devices. However, these conventional ferroelectrics suffer from various problems including poor Si-compatibility, environmental issues related to Pb, large physical thickness, low resistance to hydrogen, and small bandgap. In 2011, ferroelectricity in Si-doped HfO2 thin films was first reported. Various dopants, such as Si, Zr, Al, Y, Gd, Sr, and La can induce ferro-electricity or antiferroelectricity in thin HfO2 films. They have large remanent polarization of up to 45 μC cm(-2), and their coercive field (≈1-2 MV cm(-1)) is larger than conventional ferroelectric films by approximately one order of magnitude. Furthermore, they can be extremely thin ( 5 eV). These differences are believed to overcome the barriers of conventional ferroelectrics in memory applications, including ferroelectric field-effect-transistors and three-dimensional capacitors. Moreover, the coupling of electric and thermal properties of the antiferroelectric thin films is expected to be useful for various applications, including energy harvesting/storage, solid-state-cooling, and infrared sensors.

Ferroelectricity and Antiferroelectricity of Doped Thin HfO2‐Based Films

A non-volatile semiconductor storage device has a plurality of memory strings to each of which a plurality of electrically rewritable memory cells are connected in series. Each of the memory strings includes first semiconductor layers each having a pair of columnar portions extending in a vertical direction with respect to a substrate and a coupling portion formed to couple the lower ends of the pair of columnar portions; a charge storage layer formed to surround the side surfaces of the columnar portions; and first conductive layers formed to surround the side surfaces of the columnar portions and the charge storage layer. The first conductive layers function as gate electrodes of the memory cells.

Non-volatile semiconductor storage device and method of manufacturing the same

Three-dimensional semiconductor memory devices and methods of fabricating the same. The three-dimensional semiconductor devices include an electrode structure with sequentially-stacked electrodes disposed on a substrate, semiconductor patterns penetrating the electrode structure, and memory elements including a first pattern and a second pattern interposed between the semiconductor patterns and the electrode structure, the first pattern vertically extending to cross the electrodes and the second pattern horizontally extending to cross the semiconductor patterns.

Three dimensional semiconductor memory devices and methods of fabricating the same

A method of operating a non-volatile memory device includes performing an erasing operation to memory cells associated with a plurality of string selection lines (SSLs), the memory cells associated with the plurality of SSLs constituting a memory block, and verifying the erasing operation to second memory cells associated with a second SSL after verifying the erasing operation to first memory cells associated with a first SSL.

Nonvolatile memory device, operating method thereof and memory system including the same

Provided are a non-volatile memory device that may expand to a stacked structure and may be more easily highly integrated and an economical method of fabricating the non-volatile memory device. The non-volatile memory device may include at least one semiconductor column. At least one first control gate electrode may be arranged on a first side of the at least one semiconductor column. At least one second control gate electrode may be arranged on a second side of the at least one semiconductor column. A first charge storage layer may be between the at least one first control gate electrode and the at least one semiconductor column. A second charge storage layer may be between the at least one second control gate electrode and the at least one semiconductor column.

Non-volatile memory device and method of fabricating the same

A multi-layered non-volatile memory device and a method of manufacturing the same. The non-volatile memory device may include a plurality of first semiconductor layers having a stack structure. A plurality of control gate electrodes may extend across the first semiconductor layers. A first body contact layer may extend across the first semiconductor layers. A plurality of charge storage layers may be interposed between the control gate electrodes and the first semiconductor layers.

Non-volatile memory device and method of manufacturing the same

A non-volatile memory device may include at least one semiconductor layer, a plurality of control gate electrodes, a plurality of charge storage layers, at least one first auxiliary electrode, and/or at least one second auxiliary electrode. The plurality of control gate electrodes may be recessed into the semiconductor layer. The plurality of charge storage layers may be between the plurality of control gate electrodes and the semiconductor layer. The first and second auxiliary electrodes may be arranged to face each other. The plurality of control gate electrodes may be between the first and second auxiliary electrodes and capacitively coupled with the semiconductor layer.

Non-volatile memory device, method of operating the same, and method of fabricating the same

Provided are a non-volatile memory device, which may have a stacked structure and may be easily integrated at increased density, and a method of fabricating and using the non-volatile memory device. The non-volatile memory device may include at least one pair of first electrode lines. At least one second electrode line may be between the at least one pair of first electrode lines. At least one data storage layer may be between the at least one pair of first electrode lines and the at least one second electrode line and may locally store a resistance change.

Non-volatile memory devices and methods of fabricating and using the same

A new ultra-wideband, low-loss and small-size coplanar waveguide (CPW) to coplanar strip (CPS) transition which can be used from DC to 110 GHz is presented. The proposed transition connects CPW with CPS by the reformed air-bridge. Two ground planes of CPW are tied at their ends by a line and the centre of the line is connected to the ground strip of CPS by another line. Owing to the symmetry of the proposed structure, the currents of two ground planes of CPW are combined with the same phase and transferred to the ground strip of CPS. With height of 3 /spl mu/m, the signal line of CPW passes over two connecting lines and is connected to the signal strip of CPS. For the back-to-back transition structure, insertion loss 15 dB are obtained from 0.5 to 110 GHz.

Suk-pil Kim

Papers

Non-volatile memory device and method of fabricating the same

Non-volatile memory device and method of manufacturing the same

Non-volatile memory device, method of operating the same, and method of fabricating the same

Non-volatile memory devices and methods of fabricating and using the same

Ultra-wideband (from DC to 110 GHz) CPW to CPS transition