A highly distributed current reference for a solid-state memory comprises a centrally located current digital-to-analog converter (IDAC) and a plurality of remotely located tile current references. The IDAC comprises a first active device that generates a reference current, and a device that forms a first source degeneration resistance for the first active device. The IDAC outputs a voltage signal that represents a magnitude of the reference current. A remotely located tile current reference comprises a second active device and a device that forms a second source degeneration resistance for the second active device. The source degeneration resistances and capacitance coupled to the voltage signal output from the IDAC compensate for current, temperature, supply and process variations.

Low-power, high-accuracy current reference for highly distributed current references for cross point memory

A voltage regulator and a gate control circuit for an aid transistor coupled to assist a pass element for the voltage regulator during line transients having a given slope are disclosed. The gate control circuit includes a first circuit coupled to receive an output voltage of the voltage regulator on a first node and to provide a gate control voltage that mirrors the output voltage on a second node. A low pass filter is coupled to receive the gate control voltage and to provide a filtered gate control voltage to the gate of the aid transistor.

Apparatus having process, voltage and temperature-independent line transient management

Several applications have recently been found in renewable energy systems, industrial applications and active filters that utilize multi-cell converters. These converters have the unique ability to generate multiple voltage levels, which in turn reduces voltage stresses among all its power switches. This lowers transmission losses, increases switching frequencies and improves harmonic content. However, it is necessary to choose a good control strategy to achieve all these advantages. This study proposes two control strategies for a series three-cell chopper. The first one, is based on Lyapunov theory where the control law’s stability has been confirmed using a Lyapunov function. This methodology ensures that the voltages of the capacitors and the load current are simultaneously regulated. It has been shown that the proposed control is very simple to implement practically. In order to demonstrate its good performance during disturbances, this technique is compared to another proposed control strategy, built on cyclic reports modulation combined with a fuzzy logic controller. The voltage of the floating capacitor is maintained within its references using cyclic reports modulation, while the output current is proposed to be controlled via a fuzzy logic controller. The Proposed strategies are implemented experimentally and applied using Dspace 1104 for a series three-cell chopper to emphasize the performances of the proposed controls.

Experimental Validation of Direct and Average Based Controls for Series Three-Cell Chopper

An embodiment of the invention discloses a low-dropout linear regulator In the low-dropout linear regulator, a source electrode of a power transistor is connected with a power source, a grid electrode of the power transistor is connected with an output end of an error amplifier, and a drain electrode of the power transistor is connected with an output end of the low-dropout linear regulator A dynamic miller compensation network is connected between an output end of the error amplifier and an output end of the low-dropout linear regulator, a first end of a controller is connected with the grid electrode of the power transistor, and a second end of the controller is connected with the miller compensation network The controller is used for detecting current of the output end of the low-dropout linear regulator and generating control signals of the dynamic miller compensation network according to the current to control connection and disconnection of a second resistance-capacitance branch in the dynamic miller compensation network By adoption of the technical scheme, high stability of the low-dropout linear regulator is realized through large compensation capacitance under a light-load condition, and fast response and wide broadband are realized through small compensation capacitance under a heavy-load condition

Low-dropout linear regulator

A low-dropout regulator comprises a first switching transistor, a comparator, and a Miller capacitor. The first terminal of the first switching transistor is connected to a load, and the second terminal of the first switching transistor is connected to a power supply voltage. The first input terminal of the comparator is connected to a reference voltage, the second input terminal of the comparator is connected to the first terminal of the first switching transistor, and the output terminal of the comparator is connected to the control terminal of the first switching transistor. The first terminal of the Miller capacitor is connected to the control terminal of the first switching transistor, and the second terminal of the Miller capacitor is connected to the first terminal of the first switching transistor and the load.

Low-dropout regulators

A voltage regulator includes a pass element, a buffer, and an error amplifier. The voltage regulator further includes a fast push-pull driver that has an inverter type amplification structure, is connected between a power output and a control input of the pass element, and reduces positive and negative peaks of the power output at a speed faster than a speed of a main feedback loop.

Dual loop voltage regulator based on inverter amplifier and voltage regulating method thereof

This letter proposes a loop-free autocalibration technique for self-balancing of flying capacitors in a three-level dc–dc buck converter. The proposed converter utilizes a dual-path power stage with balancing switches that adaptively short flying capacitors at de-energizing phases. Thus, the dual-path three-level converter ensures that flying capacitor voltages are self-balanced at half the input voltage without using additional feedback calibration loops, leading to robust operation and competitive efficiencies. The prototype was fabricated in the 0.13- μ m CMOS BCD process and adopted two flying capacitors of 4.7 μ F each and an inductor of 10 μ H with a dc resistance of 128 mΩ. When an 8-V input was converted to a 3-V output voltage with a load current of 400 mA, the measured efficiency was 88.6% at 800 kHz switching while flying capacitors are automatically balanced.

Dual-Path Three-Level Buck Converter With Loop-Free Autocalibration for Flying Capacitor Self-Balancing

A direct current (DC)-DC converter including: a power switching circuit including a first switch circuit and a second switch circuit that are connected in parallel to a switching node, the first switch circuit and the second switch circuit configured to generate a switching voltage signal through the switching node in response to an input DC voltage and configured to perform complementary switching operations to control a voltage level of the switching voltage signal; and a filter circuit configured to filter the switching voltage signal to generate an output DC voltage.

Power switching circuit, a dc-dc converter including the same and a voltage conversion method

Dual loop voltage regulator based on inverter amplifier

This paper proposes a high-voltage-tolerant stacked buck converter compatible with a Li-ion battery. The proposed converter utilizes a stacked power stage with only low-voltage transistors (1.5 V) to safely convert 2.8-4.2 V battery voltage to 1 V output. The converter adopts pulse frequency modulation (PFM) control in the discontinuous conduction mode (DCM) to reduce power losses at light load. To maximize power efficiency for a wide range of operating conditions, the converter utilizes an inductor current emulator (ICE), which adaptively controls the peak inductor current against input voltage and load variations. The proposed converter chip was fabricated in 28-nm FDSOI and achieved a peak efficiency of 70% at <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">VIN = 3.6 V (nominal Li-ion voltage), <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">VOUT = 1 V, and ILOAD = 1 μA. By optimizing the peak inductor current depending on <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">VIN with ICE, the efficiency can be further improved up to 4.1% when <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">VOUT = 1 V and <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ILOAD = 10 μA, while ensuring small efficiency variation of 5.6% over the battery voltage range. The converter efficiently regulates 1 V output from 2.8-4.2 V input at 500 nA-1 mA load with stacked 1.5 V transistors, suitable for battery-powered IoT devices.

Sung-Min Yoo

Papers

Dual loop voltage regulator based on inverter amplifier and voltage regulating method thereof

Dual-Path Three-Level Buck Converter With Loop-Free Autocalibration for Flying Capacitor Self-Balancing

Power switching circuit, a dc-dc converter including the same and a voltage conversion method

Dual loop voltage regulator based on inverter amplifier

A High-Efficiency High-Voltage-Tolerant Buck Converter with Inductor Current Emulator for Battery-Powered IoT Devices