Removal of motion artifacts is a critical challenge, especially in wearable electroencephalography (EEG) and photoplethysmography (PPG) devices that are exposed to daily movements. Recently, the significance of the motion artifact removal techniques has increased since EEG based brain-computer interfaces (BCI) and daily healthcare usage of wearable PPG devices were spotlighted. In this paper, the development on EEG and PPG sensor systems is introduced. Then, understanding of motion artifact and its reduction methods implemented by hardware and/or software fashions are reviewed. Various electrode types, analog readout circuits and signal processing techniques are studied for EEG motion artifact removal. In addition, recent in-ear EEG techniques with motion artifact reduction are also introduced. Furthermore, techniques compensating independent/dependent motion artifacts are presented for PPG.

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Motion Artifact Removal Techniques for Wearable EEG and PPG Sensor Systems

There has been considerable interest in electrical impedance tomography (EIT) to provide low-cost, radiation-free, real-time and wearable means for physiological status monitoring. To be competitive with other well-established imaging modalities, it is important to understand the requirements of the specific application and determine a suitable system design. This paper presents an overview of EIT circuits and systems including architectures, current drivers, analog front-end and demodulation circuits, with emphasis on integrated circuit implementations. Commonly used circuit topologies are detailed, and tradeoffs are discussed to aid in choosing an appropriate design based on the application and system priorities. The paper also describes a number of integrated EIT systems for biomedical applications, as well as discussing current challenges and possible future directions.

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Electrical Impedance Tomography for Biomedical Applications: Circuits and Systems Review

The measurement of the tissue or bio-impedance (BIOZ) is a safe and power-efficient sensing modality that can be adopted for the acquisition of vital signals, such as respiration and heartbeat. A BIOZ readout IC with a wide-input impedance range is proposed. The IC supports vital signal acquisition through a two-electrode setup which requires a larger dynamic range than the conventional four-electrode setup. A digital-assisted baseline impedance cancellation method is implemented to measure small tissue impedance variations originating from respiration and heartbeat in the presence of larger baseline impedances. The proposed technique also mitigates the input-dependent noise behavior of the readout front-end by minimizing the effective input signal to the instrumentation amplifier (IA). The baseline cancellation loop further improves the noise performance by cancelling the reference current noise from the current generator (CG). Hence, one single solution—baseline cancellation—resolves two issues facilitating two-electrode BIOZ setups achieving similar impedance resolution performance compared with more four-electrode setups. The IC, fabricated in a 55-nm CMOS, can measure tissue impedances over a frequency range from 1 kHz to 1 MHz and can achieve a maximum input range of 24 $\text{k}\Omega $ (at the impedance measurement frequency) and a best-case resolution of 2 $\text{m}\Omega $ RMS (for a 100- $\Omega $ input). This increases to 14.0 $\text{m}\Omega $ RMS for a 2- $\text{k}\Omega $ input impedance. The ASIC consumes 18.9–34.9 and 31.4–154.7 $\mu \text{W}$ for the readout front-end and the CG, respectively. The power depends on the injected current amplitudes. A successful demonstration on the human body through a two-electrode (gel and dry) setup confirms the effectivity of the proposed work in a real use case.

A Bio-Impedance Readout IC With Digital-Assisted Baseline Cancellation for Two-Electrode Measurement

In this article, we present a real-time electroencephalogram (EEG) based depth of anesthesia (DoA) monitoring system in conjunction with a deep learning framework, AnesNET. An EEG analog front-end (AFE) that can compensate ±380-mV electrode DC offset using a coarse digital DC servo loop is implemented in the proposed system. The EEG-based MAC, EEGMAC, is introduced as a novel index to accurately predict the DoA, which is designed for applying to patients anesthetized by both volatile and intravenous agents. The proposed deep learning protocol consists of four layers of convolutional neural network and two dense layers. In addition, we optimize the complexity of the deep neural network (DNN) to operate on a microcomputer such as the Raspberry Pi 3, realizing a cost-effective small-size DoA monitoring system. Fabricated in 110-nm CMOS, the prototype AFE consumes 4.33 μW per channel and has the input-referred noise of 0.29 μVrms from 0.5 to 100 Hz with the noise efficiency factor of 2.2. The proposed DNN was evaluated with pre-recorded EEG data from 374 subjects administrated by inhalational anesthetics under surgery, achieving an average squared and absolute errors of 0.048 and 0.05, respectively. The EEGMAC with subjects anesthetized by an intravenous agent also showed a good agreement with the bispectral index value, confirming the proposed DoA index is applicable to both anesthetics. The implemented monitoring system with the Raspberry Pi 3 estimates the EEGMAC within 20 ms, which is about thousand-fold faster than the BIS estimation in literature.

A Real-Time Depth of Anesthesia Monitoring System Based on Deep Neural Network With Large EDO Tolerant EEG Analog Front-End

We demonstrate a fully integrated linear regulator for multisupply voltage microprocessors implemented in a 90 nm CMOS technology. Ultra-fast single-stage load regulation achieves a 0.54-ns response time at 94% current efficiency. For a 1.2-V input voltage and 0.9-V output voltage the regulator enables a 90 mVp-p output droop for a 100-mA load step with only a small on-chip decoupling capacitor of 0.6 nF. By using a PMOS pull-up transistor in the output stage we achieved a small regulator area of 0.008 mm 2 and a minimum dropout voltage of 0.2 V for 100 mA of output current. The area for the 0.6-nF MOS capacitor is 0.090 mm 2 .

Area-efficient linear regulator with ultra-fast load regulation

In-ear brain–computer interface (BCI) controller system is implemented with a dedicated system-on-chip (SoC) including electroencephalography (EEG) readout and body channel communication (BCC) transceiver (TRX). The 8-mm2 chip is fabricated using 65-nm CMOS and contains three key features: 1) current reusing low-noise amplifier (CRLNA) for low power; 2) bootstrapping dc servo loop (BDSL) enabling low-noise measurement even on 350-mV electrode dc offset (EDO); and 3) dual-mode programmable gain amplifier (DMPGA) that reduces TRX power consumption by activating only when the intentional blink is present. EEG instrumentation amplifier (IA) shows the state-of-the-art 8.8 power efficiency factor (PEF) performance, and the entire integrated circuit (IC) consumes 82.9 $\mu \text{W}$ . From the measurement, with nine subjects, the proposed BCI system accomplished 84% average accuracy for the binary selection task.

A 0.8-V 82.9- $\mu$ W In-Ear BCI Controller IC With 8.8 PEF EEG Instrumentation Amplifier and Wireless BAN Transceiver

Continuous monitoring of fluid status through bio-impedance (Bio-Z) measurement of thoracic magnitude or phase is critical in reducing the mortality of chronic heart failure (CHF) patients. However, the stringent power constraints of implantable devices force the design of Bio-Z sensors to be highly challenging. We present a sub-10- $\mu \text{W}$ Bio-Z sensor IC operating from a 0.5 V-supply, sustaining a sub-1° of phase error even under 10% of supply and 0 °C–70 °C of temperature variations. Fabricated in a 65-nm CMOS process, this sensor IC exhibits a 15.28- $\text{m}\Omega /\surd $ Hz of input-referred impedance noise performance, occupying a 4.83 mm2. Its linearity performance shows that the magnitude and the phase of Bio-Z can be measured within the error of 2% and 0.4°, respectively, given that the magnitude of load impedance is less than 126 $\Omega $ , and thus, it is suitable for fluid status monitoring applications. Experimental measurement on the human chest demonstrates its capabilities of thoracic impedance variance (TIV) and impedance cardiography (ICG) monitoring.

A 0.5-V Sub-10-μW 15.28-mΩ/√Hz Bio-Impedance Sensor IC With Sub-1° Phase Error

An eight-channel 10-MHz wide-bandwidth electrical impedance tomography (EIT) IC is proposed for early breast cancer detection system. To increase the resolution of EIT images, the proposed IC has three key features: 1) wide-bandwidth instrumentation amplifier (WB-IA) to detect large impedance changes in cancer cells at a high frequency; 2) dual-mode driver (DM-driver) to obviate the complex switching network to reduce the noise and the system form factor; and 3) phase compensation loop (PCL) to efficiently correct the phase error for accurate images without artifacts. The proposed EIT IC occupies 16 mm2 in the 65-nm CMOS technology and consumes 9.6 mW for each channel. Thanks to the key features, the proposed breast cancer detection system with the dedicated EIT IC can operate up to 10 MHz with a small phase error of 4.32° and a state-of-the-art impedance resolution of 1.6 $\text{m}\Omega /\surd $ Hz eventually can detect a small-size target object of 0.5 cm and verify with the phantom experiments.

A 9.6-mW/Ch 10-MHz Wide-Bandwidth Electrical Impedance Tomography IC With Accurate Phase Compensation for Early Breast Cancer Detection

A 10MHz wide-bandwidth Electrical Impedance Tomography (EIT) IC is proposed for compact and high-precision breast cancer detection system. The proposed IC has three key features: 1) wide dynamic range LNA (WDR-LNA), enabling low noise impedance measurements for the high-resolution imaging, 2) reconfigurable front-end architecture (RFA) to remove external multiplexer for the compact system integration, and 3) phase compensation loop (PCL) to efficiently correct the phase error, which is the primary challenge in wide-bandwidth EIT system. Thanks to the key features, the proposed prototype breast cancer detection system with the dedicated EIT IC can operate up to 10 MHz with a small phase error of 4.32 degree, eventually can detect a small size target object of 0.5 cm and verified with the phantom experiments.

A 9.6 mW/Ch 10 MHz Wide-bandwidth Electrical Impedance Tomography IC with Accurate Phase Compensation for Breast Cancer Detection

Current-efficient, fast-transient reconfigurable low-dropout regulator (LDO) is proposed for the wireless sensor network (WSN) system. The proposed LDO is designed and simulated in a 65 nm CMOS process showing the 3 key features: 1) a reconfigurable LDO architecture to achieve both low quiescent current (IQ) and wide bandwidth by adaptively adjusting to different load current conditions, 2) ultra-low-IQ and high PSR regulator for light-load efficient operation utilizing the gain boosting scheme within the flipped voltage follower loop, and 3) fast transient regulator for robust heavy-load operation with level-shifted impedance attenuation buffer (IAB) to reduce the supply ripples generated by wireless transceiver. The proposed LDO shows the state-of-the-art 93.8% current efficiency in the load condition of 1 μΑ, and achieves 0.672 ns response time even with 10 ns load transition.

Surin Gweon

Papers

A 0.8-V 82.9- $\mu$ W In-Ear BCI Controller IC With 8.8 PEF EEG Instrumentation Amplifier and Wireless BAN Transceiver

A 0.5-V Sub-10-μW 15.28-mΩ/√Hz Bio-Impedance Sensor IC With Sub-1° Phase Error

A 9.6-mW/Ch 10-MHz Wide-Bandwidth Electrical Impedance Tomography IC With Accurate Phase Compensation for Early Breast Cancer Detection

A 9.6 mW/Ch 10 MHz Wide-bandwidth Electrical Impedance Tomography IC with Accurate Phase Compensation for Breast Cancer Detection

93.8% Current Efficiency and 0.672 ns Transient Response Reconfigurable LDO for Wireless Sensor Network Systems