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Syed Ahmed Aamir
Researcher at Heidelberg University
Publications - 17
Citations - 379
Syed Ahmed Aamir is an academic researcher from Heidelberg University. The author has contributed to research in topics: Neuromorphic engineering & Biological neuron model. The author has an hindex of 8, co-authored 17 publications receiving 267 citations. Previous affiliations of Syed Ahmed Aamir include Bielefeld University & Linköping University.
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Journal ArticleDOI
Demonstrating Advantages of Neuromorphic Computation: A Pilot Study
Timo C. Wunderlich,Akos F. Kungl,Eric Müller,Andreas Hartel,Yannik Stradmann,Syed Ahmed Aamir,Andreas Grübl,Arthur Heimbrecht,Korbinian Schreiber,D. Stockel,Christian Pehle,Sebastian Billaudelle,Gerd Kiene,Christian Mauch,Johannes Schemmel,Karlheinz Meier,Mihai A. Petrovici,Mihai A. Petrovici +17 more
TL;DR: It is demonstrated how on-chip learning can mitigate the effects of fixed-pattern noise, which is unavoidable in analog substrates, while making use of temporal variability for action exploration and compensates imperfections of the physical substrate.
Journal ArticleDOI
An Accelerated LIF Neuronal Network Array for a Large Scale Mixed-Signal Neuromorphic Architecture
Syed Ahmed Aamir,Yannik Stradmann,Paul Müller,Christian Pehle,Andreas Hartel,Andreas Grübl,Johannes Schemmel,Karlheinz Meier +7 more
TL;DR: In this article, the authors present an array of leaky integrate-and-fire (LIF) neuron circuits designed for the second-generation BrainScaleS mixed-signal 65-nm CMOS neuromorphic hardware.
Journal ArticleDOI
An Accelerated LIF Neuronal Network Array for a Large-Scale Mixed-Signal Neuromorphic Architecture
Syed Ahmed Aamir,Yannik Stradmann,Paul Müller,Christian Pehle,Andreas Hartel,Andreas Grübl,Johannes Schemmel,Karlheinz Meier +7 more
TL;DR: An array of leaky integrate-and-fire (LIF) neuron circuits designed for the second-generation BrainScaleS mixed-signal 65-nm CMOS neuromorphic hardware and demonstrates a winner-take-all network on the prototype chip as a typical element of cortical processing.
Journal ArticleDOI
A Mixed-Signal Structured AdEx Neuron for Accelerated Neuromorphic Cores
Syed Ahmed Aamir,Paul Müller,Gerd Kiene,Laura Kriener,Yannik Stradmann,Andreas Grübl,Johannes Schemmel,Karlheinz Meier +7 more
TL;DR: A multicompartment neuron circuit based on the adaptive-exponential I&F (AdEx) model, developed for the second-generation BrainScaleS hardware, which reproduces a diverse set of firing patterns observed in cortical pyramidal neurons.
Proceedings ArticleDOI
A highly tunable 65-nm CMOS LIF neuron for a large scale neuromorphic system
TL;DR: The design and measurement of a continuous-time, accelerated, reconfigurable Leaky Integrate and Fire (LIF) neuron model emulated in 65-nm CMOS technology are presented and a one-to-one correspondence to software simulation for a typical computational model neuron is demonstrated.