S
Szu-Jui Chou
Researcher at National Taiwan University
Publications - 6
Citations - 89
Szu-Jui Chou is an academic researcher from National Taiwan University. The author has contributed to research in topics: Electronic circuit & Circuit design. The author has an hindex of 5, co-authored 6 publications receiving 79 citations. Previous affiliations of Szu-Jui Chou include Synopsys.
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Journal ArticleDOI
A Novel Wire-Density-Driven Full-Chip Routing System for CMP Variation Control
TL;DR: This paper presents a new full-chip grid-based routing system considering wire density for reticle planarization enhancement, which applies a novel two-pass top-down planarity-driven routing framework that employs new density critical area analysis based on Voronoi diagrams and incorporates an intermediate stage of a density-driven layer/track assignment based on incremental Delaunay triangulation.
Proceedings ArticleDOI
Density gradient minimization with coupling-constrained dummy fill for CMP control
TL;DR: This paper presents the first gradient-driven dummy-fill algorithm to address the density gradient and other classical objectives (such as density variation, coupling constraints, dummy count) as well.
Proceedings ArticleDOI
Novel wire density driven full-chip routing for CMP variation control
TL;DR: In this paper, a grid-based routing system considering wire density for reticle planarization enhancement is presented, which employs a new density critical area analysis based on Voronoi diagrams and incorporates an intermediate stage of density-driven layer/track assignment.
Journal ArticleDOI
An Efficient Graph-Based Algorithm for ESD Current Path Analysis
Chih-Hung Liu,Hung-Yi Liu,Chung-Wei Lin,Szu-Jui Chou,Yao-Wen Chang,Sy-Yen Kuo,Shih-Yi Yuan,Y.-W. Chen +7 more
TL;DR: This paper introduces the analysis problem for ESD protection in circuit design, model the circuit as a constraint graph, decompose the ESD connected components (ECCs) linked with the pads, and applies breadth-first search to identify the ECCs in each constraint graph and, thus, the current paths.
Proceedings ArticleDOI
Current path analysis for electrostatic discharge protection
TL;DR: Wang et al. as discussed by the authors introduced the analysis problem for electrostatic discharge (ESD) protection in circuit design and applied the breadth-first search (BFS) to identify the ESD connected components in each constrained graph.