In fabricating a thin film transistor, an active layer comprising a silicon semiconductor is formed on a substrate having an insulating surface Hydrogen is introduced into The active layer A thin film comprising SiO x N y is formed to cover the active layer and then a gate insulating film comprising a silicon oxide film formed on the thin film comprising SiO x N y  Also, a thin film comprising SiO x N y is formed under the active layer The active layer includes a metal element at a concentration of 1×10 15 to 1×10 19 cm −3 and hydrogen at a concentration of 2×10 19 to 5×10 21 cm −3 

Semiconductor device and method for forming the same

A method of obtaining a porous titanium surface suitable for medical implants is provided. The titanium surface is exposed to a plasma comprising a reactive plasma gas, the reactive plasma gas comprising an active etching species and a sputtering gas. The plasma conditions are effective to modify the titanium surface and provide surface porosity. The plasma conditions are effective to non-uniformly etch and sputter the titanium surface.

Surface modification of medical implants

Each transistor or logic unit on an integrated wafer (1) is tested prior to interconnect metallization. By means of CAD software, the transistor or logic units placement net list is revised to substitute redundant defect-free logic units for defective ones. Then the interconnect metallization is laid down and patterned under control of a CAD computer syste. Each die in the wafer thus has its own interconnect scheme, although each die is functionally equivalent, and yields are much higher than wich conventional testing at the completed circuit level. The individual transistor or logic unit testing is accomplished by specially fabricated flexible tester surface (10) made in one embodiment of several layers of flexible silicon dioxide, each layer containing vias and conductive traces leading to thousands of microscopic metal probe points (15-1, 15-2) on one side of the test surface (10). The probe points (330) electrically contact the contacts (2-1, 2-2) on the wafer (1) under test by fluid pressure.

Making and testing an integrated circuit using high density probe points

A probe card assembly includes a probe card, a space transformer having resilient contact structures (probe elements) mounted directly to (i.e., without the need for additional connecting wires or the like) and extending from terminals on a surface thereof, and an interposer disposed between the space transformer and the probe card. The space transformer and interposer are “stacked up” so that the orientation of the space transformer, hence the orientation of the tips of the probe elements, can be adjusted without changing the orientation of the probe card. Suitable mechanisms for adjusting the orientation of the space transformer, and for determining what adjustments to make, are disclosed. The interposer has resilient contact structures extending from both the top and bottom surfaces thereof, and ensures that electrical connections are maintained between the space transformer and the probe card throughout the space transformer's range of adjustment, by virtue of the interposer's inherent compliance. Multiple die sites on a semiconductor wafer are readily probed using the disclosed techniques, and the probe elements can be arranged to optimize probing of an entire wafer. Composite interconnection elements having a relatively soft core overcoated by a relatively hard shell, as the resilient contact structures are described.

Probe card assembly and kit, and methods of making same

Ion sources, systems and methods are disclosed. In some embodiments, the ion sources, systems and methods can exhibit relatively little undesired vibration and/or can sufficiently dampen undesired vibration. This can enhance performance (e.g., increase reliability, stability and the like). In certain embodiments, the ion sources, systems and methods can enhance the ability to make tips having desired physical attributes (e.g., the number of atoms on the apex of the tip). This can enhance performance (e.g., increase reliability, stability and the like).

Ion sources, systems and methods

In locally reactive etching by irradiating to a multilayered workpiece reactive beam generated by extracting the reactant gas ionized or by irradiating such focussing beam as ion beam, electron beam or laser beam to the multilayered workpiece in an atmosphere of reactant gas; each layer of a multilayered device comprising a plurality of layers formed on a substrate can be accurately and quickly eteched by detecting the change of the material of the layer currently being etched and after detecting the change of material, switching reactant gas to be ionized or atmospheric reactant gas to one complying with the material of the layer currently being etched. This multilayered device micro etching method can be readily put into practice by a multilayered device micro etching system further comprising means for detecting the change of the material of layer to be etched and means for switching and supplying a plurality of reactant gases, in a micro etching appratus for performing locally rective etching.

Multilayered device micro etching method and system

The present invention relates to a semiconductor integrated circuit device and a process for producing the same. A hole is bored in an insulating film above a portion of a wiring which is to be connected to another wiring by means of a focused ion beam. The inside of the hole and a predetermined region on the insulating film are irradiated with either a laser beam or an ion beam in a metal compound gas to deposit metal in the hole and on said region and a connecting wiring is formed by means of optically pumped CVD. To electrically connect upper- and lower-level wirings in a multilayer wiring structure by a connecting wiring, the connecting wiring is electrically isolated from an intermediate-level wiring through which it extends. The above-described arrangement enables provision of a hole with a focused ion beam and formation of a metal wiring on a selective region by means, for example, optically pumped CVD. Accordingly, it is possible to effect fine machining and electrically connect together wirings inside an LSI after the completion thereof. It is therefore possible to carry out debugging, repair and a defect analysis of the LSI.

Semiconductor integrated circuit device and process for producing the same

A processing method and apparatus using a focused energy beam for conducting local energy beam processing in a focused energy beam irradiating area by irradiating a sample with a focused energy beam such as an ion beam or an electron beam in an etching gas atmosphere. As the etching gas, a mixed gas different in composition from any conventional one is employed and the gas is uniformly supplied to an etching area and at least one of the components of such a mixed gas is a spontaneous reactive gas for use in etching the sample spontaneously and isotropically. With this arrangement, it is possible to subject to local etching a material for which the local etching has been impossible to provide since a single etching gas causes a reaction too fierce or causes almost nearly no reaction.

Processing method and apparatus using focused energy beam

Herein disclosed are a variety of techniques relating to the wiring and logic corrections on a chip by making use of the focused ion beam (which is shortly referred to as “FIB”) or the laser selection metal CVD. The time periods for the wiring corrections and for debugging and developing an electronic system are shortened by making use of the processing characteristics of the FIB. Illustratively, a hole is bored in an insulating film above a portion of a wiring which is to be connected to another wiring by means of a focused ion beam. The inside of the hole and a predetermined region on the insulating film are irradiated with either a laser beam or an ion beam in a metal compound gas to deposit metal in the hole and on said region and a connecting wiring is formed by means of optically pumped CVD. The present invention also relates to an IC or VLSI structure having a trial cutting region, at test etching region and an auxiliary wiring or pad, suitable for the application of such defect correction and circuit change, as well as a method of making same, a designing method using such technique, and a focused ion beam system and other systems for use in those methods.

Method of making wiring and logic corrections on a semiconductor device by use of focused ion beams

A IC wiring connecting method for interconnecting conductive lines of the same wiring plane of an IC chip for correcting the wiring, for interconnecting conductive lines of different wiring lanes of a multilayer IC chip at the same position, or for connecting a conductive line of a lower wiring plane of a multilayer IC chip to a conductive line formed at a separate position on the same multilayer IC chip. The insulating film or films covering conductive lines to be interconnected are processed by an energy beam such as a concentrated ion beam to form holes so as to expose the respective parts of the conductive lines where the conductive lines are to be interconnected, then a metal is deposited over the surfaces of the holes and an area interconnecting the holes by irradiating the surfaces of the holes and the area by an energy beam or a concentrated ion beam in an atmosphere of a gaseous organic metal compound to form a conductive metal film electrically interconnecting the conductive lines. Also provided is an apparatus for carrying out the IC wiring connecting method, which comprises, as essential components, an ion beam material processing system, an insulating film forming system such as a laser induced CVD unit, a conductive film forming system, and an insulating film etching system.

Takahashi Takahiko

Papers

Multilayered device micro etching method and system

Semiconductor integrated circuit device and process for producing the same

Processing method and apparatus using focused energy beam

Method of making wiring and logic corrections on a semiconductor device by use of focused ion beams

IC wiring connecting method and resulting article