A method of obtaining a porous titanium surface suitable for medical implants is provided. The titanium surface is exposed to a plasma comprising a reactive plasma gas, the reactive plasma gas comprising an active etching species and a sputtering gas. The plasma conditions are effective to modify the titanium surface and provide surface porosity. The plasma conditions are effective to non-uniformly etch and sputter the titanium surface.

Surface modification of medical implants

A method and apparatus for creating a phase shifting mask and a structure mask for shrinking integrated circuit designs. One embodiment of the invention includes using a two mask process. The first mask is a phase shift mask and the second mask is a single phase structure mask. The phase shift mask primarily defines regions requiring phase shifting. The single phase structure mask primarily defines regions not requiring phase shifting. The single phase structure mask also prevents the erasure of the phase shifting regions and prevents the creation of undesirable artifact regions that would otherwise be created by the phase shift mask. Both masks are derived from a set of masks used in a larger minimum dimension process technology.

Phase shifting circuit manufacture method and apparatus

In one embodiment, the invention provides a method for fabricating a microelectromechanical systems device The method comprises fabricating a first layer comprising a film having a characteristic electromechanical response, and a characteristic optical response, wherein the characteristic optical response is desirable and the characteristic electromechanical response is undesirable; and modifying the characteristic electromechanical response of the first layer by at least reducing charge build up thereon during activation of the microelectromechanical systems device

Controlling electromechanical behavior of structures within a microelectromechanical systems device

Techniques are provided for extending the use of phase shift techniques to implementation of masks used for complex layouts in the layers of integrated circuits, beyond selected critical dimension features. The method includes identifying features for which phase shifting can be applied, automatically mapping the phase shifting regions for implementation of such features, resolving phase conflicts which might occur according to a given design rule, and application of assist features and proximity correction features. The method includes applying an adjustment to a phase shift mask pattern including a first and a second phase shift window, and a control chrome with a control width, and/or to a trim mask pattern having a trim shape with a trim width based upon one or both of a rule based correction and a model based correction to improve a match between a resulting exposure pattern and a target feature.

Phase shift masking for complex patterns with proximity adjustments

Phase information is incorporated into a cell-based design methodology Standard cells have four edges: top, bottom, left, and right The top and bottom edges have fixed phase shifters placed, eg 0 A given cell C will have a phase set created with two versions: 0-180 (left-right) as well as 180-0 Alternatively, the same phase set: 0—0 and 180—180 could be created for a cell The phase sets are selected based on the ability to phase shift the features within the cell C By creating a phase set for most of the cells of a cell library, standard cell placement and routing techniques can be used and phase can then be quickly assigned using a simple ripple technique This ensures a phase compliant design upfront for the standard cell areas In some instances, phase sets are created for every cell in a library

Standard cell design incorporating phase information

A processing method and a processing apparatus realizing the method use a focused ion beam generator. The apparatus includes a plasma or liquid metal ion source producing ions not influencing electric characteristics of a sample, an ion beam generator for extracting ions from the ion source into an ion beam, an ion beam focusing device for focusing the ion beam, an irradiator for irradiating the focused ion beam onto the sample, and a sample chamber in which the sample to be irradiated for processing is installed. The focused ion beam is irradiated onto a sample such as a silicon wafer or device to conduct on a particular position of the sample a fine machining work, a fine layer accumulation, and an analysis.

Process method and apparatus using focused ion beam generating means

A processing method and apparatus using a focused energy beam for conducting local energy beam processing in a focused energy beam irradiating area by irradiating a sample with a focused energy beam such as an ion beam or an electron beam in an etching gas atmosphere. As the etching gas, a mixed gas different in composition from any conventional one is employed and the gas is uniformly supplied to an etching area and at least one of the components of such a mixed gas is a spontaneous reactive gas for use in etching the sample spontaneously and isotropically. With this arrangement, it is possible to subject to local etching a material for which the local etching has been impossible to provide since a single etching gas causes a reaction too fierce or causes almost nearly no reaction.

Processing method and apparatus using focused energy beam

Herein disclosed are a variety of techniques relating to the wiring and logic corrections on a chip by making use of the focused ion beam (which is shortly referred to as “FIB”) or the laser selection metal CVD. The time periods for the wiring corrections and for debugging and developing an electronic system are shortened by making use of the processing characteristics of the FIB. Illustratively, a hole is bored in an insulating film above a portion of a wiring which is to be connected to another wiring by means of a focused ion beam. The inside of the hole and a predetermined region on the insulating film are irradiated with either a laser beam or an ion beam in a metal compound gas to deposit metal in the hole and on said region and a connecting wiring is formed by means of optically pumped CVD. The present invention also relates to an IC or VLSI structure having a trial cutting region, at test etching region and an auxiliary wiring or pad, suitable for the application of such defect correction and circuit change, as well as a method of making same, a designing method using such technique, and a focused ion beam system and other systems for use in those methods.

Method of making wiring and logic corrections on a semiconductor device by use of focused ion beams

A method of etching a semiconductor device having multi-layered wiring by an ion beam is disclosed which method comprises the steps of: extracting a high-intensity ion beam from a high-density ion source; focusing the extracted ion beam; causing the focused ion beam to perform a scanning operation by a voltage applied to a deflection electrode; forming a first hole in the semiconductor device by the focused ion beam to a depth capable of reaching an insulating film formed between upper and lower wiring conductors so that the first hole has a curved bottom corresponding to the undulation of the upper wiring conductor, and the upper wiring conductor is absent at the bottom of the first hole; and scanning a portion of the bottom of the first hole with the focused ion beam to form a second hole in the insulating film to a depth capable of reaching the lower wiring conductor, thereby preventing the shorting between the upper and lower wiring conductors. Further, a method of forming a hole of a predetermined shape at a surface area having a step-like portion of a semiconductor device by an ion beam is disclosed which method comprises a pre-etching step of scanning the high-level region of the step-like portion with the ion beam so that the high-level region becomes equal in level to the low-level region of the step-like portion, and a main step of scanning the whole of the surface area with the ion beam till the hole of the predetermined shape is formed in the semiconductor device.

Method of etching a semiconductor device by an ion beam

An i‐line phase‐shifting mask technology intended for practical use has been developed. The new technology can provide defect‐free phase‐shifting masks and can produce 0.3 μm large scale integration with large lithographic latitudes. The phase‐shifting masks manufactured here apply the following two major techniques. The first technique is to form phase‐shifting patterns on the chrome mask. This technique features single‐layer shifters using an organic spin on glass (SOG), a simple patterning process of the SOG, and a focused ion beam gas‐assisted etching repair process of shifter defects. The second technique is to create half‐micron chrome patterns using a high‐accuracy e‐beam writing system ‘‘EB‐MX’’ and high‐resolution chemically amplified e‐beam resist ‘‘PSR’’.

Fumikazu Itoh

Papers

Process method and apparatus using focused ion beam generating means

Processing method and apparatus using focused energy beam

Method of making wiring and logic corrections on a semiconductor device by use of focused ion beams

Method of etching a semiconductor device by an ion beam

Practical phase‐shifting mask technology for 0.3 μm large scale integrations