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Takehito Teramae

Researcher at Denso

Publications -  7
Citations -  88

Takehito Teramae is an academic researcher from Denso. The author has contributed to research in topics: Printed circuit board & Footprint (electronics). The author has an hindex of 3, co-authored 7 publications receiving 88 citations.

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Patent

Method for interconnecting printed circuit boards and interconnection structure

TL;DR: In this article, a first and second printed circuit board is prepared with the first having an insulating substrate of thermoplastic resin and a conductive pattern with a land, while the second has a conductively pattern with land; overlapping the land of the first board with the ground of the second board is done to form an interconnection portion; and heating the interconnection part at a temperature approximately higher than a glass transition temperature of the thermoplastastic resin, while applying pressure to the interfacement portion to create an electrical interconnection sealed with a part of the insulating
Patent

Connecting structure of printed circuit boards

TL;DR: In this paper, a flexible printed circuit board is electrically connected with a rigid printed circuit through solder, and the solder resist is formed between neighboring two lands on the rigid printed circuits and is terminated with an end portion that is interposed between the rigid circuit board and the flexible circuit board.
Patent

Connecting method and connecting structure of printed circuit boards

TL;DR: In this paper, a flexible printed circuit board is electrically connected with a rigid printed circuit through solder, and the solder resist is formed between neighboring two lands on the rigid printed circuits and is terminated with an end portion that is interposed between the rigid circuit board and the flexible circuit board.
Patent

Process for joining circuit boards comprises overlapping the connecting surface of the first board with the connecting surface of the second board to form a connecting section and heating

TL;DR: In this article, the electrical connecting section for circuit boards is sealed with one part (12a) of resin which represents the insulating substrate (12) of the first board, and the second board has a conductive pattern (11) with a connecting surface (11a).
Patent

Verfahren zum Verbinden von gedruckten Leiterplatten

TL;DR: Verfahren zum Verbinden von gedruckten Leiterplatten, mit den Schritten: Bilden einer ersten leitfahigen struktur (13), welche eine erste Mehrzahl von Kontaktflecken (13a) enthalt, auf einer eus einem thermoplastischen Harz hergestellten leiterplatte (5);