scispace - formally typeset
Search or ask a question

Showing papers by "Takeshi Shimoyama published in 2001"


Book ChapterDOI
02 Apr 2001
TL;DR: A new symmetric key block cipher SC2000 with 128-bit block length and 128-,192-,256- bit key lengths and the fast software implementations are available by using the techniques of putting together S-boxes in various ways and of the Bitslice implementation.
Abstract: In this paper, we propose a new symmetric key block cipher SC2000 with 128-bit block length and 128-,192-,256- bit key lengths. The block cipher is constructed by piling two layers: one is a Feistel structure layer and the other is an SPN structure layer. Each operation used in two layers is S-box or logical operation, which has been well studied about security. It is a strong feature of the cipher that the fast software implementations are available by using the techniques of putting together S-boxes in various ways and of the Bitslice implementation.

35 citations


Patent
01 Jun 2001
TL;DR: In this paper, an extended key-preparing equipment for the case where a common key cryptosystem is applied is described, and a recording medium used therefor is provided.
Abstract: Intermediate data ai, bi, ci, and di are prepared by an intermediate data preparing equipment 4 from a cryptographic key through a nonlinear type function operation and the like, an extended key preparing equipment 5 selects a [Xr], b [Yr], c [Zr], and d [Wr] corresponding to the number of stages r from the intermediate data, and rearranges the data as well as conducts that of bit operation to prepare extended keys, whereby an extended key preparing apparatus by which an extended key required in the case where common key cryptosystem is applied can be safely prepared at a high speed, a process for preparing such an extended key, and a recording medium used therefor are provided.

20 citations


Patent
21 Mar 2001
TL;DR: In this paper, a unit receives the input of a set T of bit numbers that are obtained by unequally dividing all the bit numbers of input data to be given to a computing apparatus, a unit outputting a value AT indicating an existence probability of an appropriate linear converting unit corresponding to a plurality of S boxes of which the input and output bit numbers are equivalent to the divided bit numbers, and a unit determining that an appropriate unit is present when the value of AT is positive.
Abstract: By providing a unit receiving the input of a set T of bit numbers that are obtained by unequally dividing all the bit numbers of input data to be given to a computing apparatus, a unit outputting a value AT indicating an existence probability of an appropriate linear converting unit corresponding to a plurality of S boxes of which the input and output bit numbers are equivalent to the divided bit numbers, a unit determining that an appropriate linear converting unit is present when the value of AT is positive, and a unit forming a pseudo MDS matrix as the linear converting unit, computation is executed using a unit with an excellent data diffusion performance as the linear converting unit in SPN structure, when the input number is not the same as the output number among a plurality of S boxes of the SPN structure in an F function.

15 citations


Patent
09 Jul 2001
TL;DR: In this paper, the authors proposed to use non-linear conversion means to reduce computational complexity and improve data spreading performance in a common key block ciphering system, in which the linear relational expression related only to a half number of fixed input bits and a half amount of output bits at the same position satisfies all the probabilities as 1/2 holding between all the input and output data.
Abstract: PROBLEM TO BE SOLVED: To reduce computational complexity and also improve data spreading performance in a common key block ciphering system. SOLUTION: One or more means 2 for performing data conversion using a Feistel structure and one or more means 3 for performing data conversion using an SPN structure are cascaded between a data input and a data output. In an SPN structure, a non-linear conversion means is used, by which the linear relational expression related only to a half number of fixed input bits and a half number of output bits at the same position satisfies all the probabilities as 1/2 holding between all the input and output data.

4 citations


Patent
09 Jul 2001
TL;DR: In this paper, the problem of using a linear conversion part in an SPN structure excellent in a data spreading performance, when the numbers of input and output bits are not the same among plural S-boxes in an F-function, is addressed.
Abstract: PROBLEM TO BE SOLVED: To perform an arithmetic operation using a linear conversion part in an SPN structure excellent in a data spreading performance, when the numbers of input and output bits are not the same among plural S-boxes in the SPN structure in an F-function SOLUTION: This arithmetic unit is provided with a means 1 for receiving an input of a set of bit numbers unequally dividing the total number of bits of input data to be given to the arithmetic unit 1, and a means 3 for outputting a value AT presenting a possibility of existence of a suitable linear conversion part corresponding to the plural S-boxes having the divided bit numbers as their input-output bit numbers, respectively Further, the arithmetic unit is provided with a means 4 for judging that the proper linear conversion part exists when the value of AT is positive, and a means 5 for generating a pseudo MDS matrix as such a linear conversion part

4 citations


Patent
12 Jul 2001
TL;DR: In this article, an expanded key generation device was proposed to improve security of a common key system relating to an expanded-key generation device for generating expanded keys from a ciphered key by dividing a bit string of an inputted cryptographic key into plural groups, and processing these divided groups of the bit strings each by arithmetic operation plural (i) times.
Abstract: PROBLEM TO BE SOLVED: To improve security of a common key system relating to an expanded key generation device for generating an expanded key from a ciphered key by generating intermediate data from the ciphered key at a 1st step, selecting an arbitrary data from the intermediate data at a 2nd step to process it by a irreversible conversion and generating an expanded key of the arbitrary number of steps, and speedily generating expanded key of the arbitrary steps through the irreversible conversion. SOLUTION: This device is configured so as to be provided with an intermediate data generating means for dividing a bit string of an inputted cryptographic key into plural groups, generating an operation result of a plural number i by processing these divided groups of the bit strings each by arithmetic operation plural (i) times, performing an arithmetic operation for gathering the operation results together respectively among the plural groups concerning the operation results of the plural number i of each of these generated groups, and generating the plural number (i) of the intermediate data, and an expanded key generation for selecting one of the plural number (i) of the intermediate data based on the number of steps r of a specified expanded key, and processing the selected intermediate data by the irreversible conversion to generate the expanded key of the number of steps r.

2 citations