T
Tatiana Shpeisman
Researcher at Intel
Publications - 86
Citations - 3152
Tatiana Shpeisman is an academic researcher from Intel. The author has contributed to research in topics: Transactional memory & Compiler. The author has an hindex of 31, co-authored 84 publications receiving 2998 citations. Previous affiliations of Tatiana Shpeisman include University of Maryland, College Park & PARC.
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Patent
Methods and systems for transactional nested parallelism
TL;DR: In this article, the first thread is associated with a transactional descriptor comprising a pointer to the parent transaction, and a group of one or more concurrent threads including a first thread are created.
Patent
Efficient non-transactional write barriers for strong atomicity
TL;DR: In this article, a method and apparatus for providing optimized strong atomicity operations for non-transactional writes is described. But it does not address the problem of lock acquisition.
Patent
Dynamic optimization for removal of strong atomicity barriers
TL;DR: In this article, a method and apparatus for dynamic optimization of strong atomicity barriers is described during runtime compilation, where code including non-transactional memory accesses that are to conflict with transactional accesses is patched to insert transactional barriers at the conflicting non-Transactional Memory Accesses.
Patent
Optimizing quiescence in a software transactional memory (stm) system
TL;DR: In this paper, a method and apparatus for optimizing quiescence in a transactional memory system is described, where non-ordering transactions, such as read-only transactions, transactions that do not access non-transactional data, and write-buffering hardware transactions, are identified.
Patent
Mechanisms for strong atomicity in a transactional memory system
TL;DR: In this paper, a method and apparatus for providing efficient strong atomicity is described, where optimized strong operations are inserted at non-transactional read accesses to provide efficient strong atomicicity.