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Tatiana Shpeisman

Researcher at Intel

Publications -  86
Citations -  3152

Tatiana Shpeisman is an academic researcher from Intel. The author has contributed to research in topics: Transactional memory & Compiler. The author has an hindex of 31, co-authored 84 publications receiving 2998 citations. Previous affiliations of Tatiana Shpeisman include University of Maryland, College Park & PARC.

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Patent

Enabling maximum concurrency in a hybrid transactional memory system

TL;DR: In this paper, an execution logic for concurrent execution of at least one first software transaction and at least two second software transactions of a second software transaction mode is presented, where the execution logic is implemented within the processor.
Proceedings ArticleDOI

NePalTM: design and implementation of nested parallelism for transactional memory systems

TL;DR: The programming model, design and implementation of NePalTM; a transactional memory system where atomic blocks can be used for concurrency control at an arbitrary level of nested parallelism are presented.
Patent

Mixed inference using low and high precision

TL;DR: In this article, a general-purpose graphics processing unit comprising a streaming multiprocessor having a single instruction, multiple thread (SIMT) architecture including hardware multithreading is presented.
Journal ArticleDOI

Compiler Support for Sparse Tensor Computations in MLIR

TL;DR: This paper proposes treating sparsity as a property of tensors, not a tedious implementation task, and letting a sparse compiler generate sparse code automatically from a sparsity-agnostic definition of the computation.
Patent

Adaptive scheduling for task assignment among heterogeneous processor cores

TL;DR: In this paper, the authors present a system for adaptive task assignment among heterogeneous processor cores, including any number of CPUs, a graphics processing unit (GPU) and memory configured to store a pool of work items to be shared by the CPUs and the GPU.