Showing papers by "Tetsuya Hirose published in 2021"

A 35-mV Supply Ring Oscillator Consisting of Stacked Body Bias Inverters for Extremely Low-Voltage LSIs

Abstract: This paper proposes a ring oscillator (ROSC) for extremely low-voltage LSI applications. The ROSC consists of dedicated low-voltage stacked body bias inverters (SBBIs) that are based on the conventional selfbias inverter (SBI) and stacked inverter (SI). The proposed SBBI employs the advantages of both SBI and SI to oscillate at extremely low supply voltage. The voltage gain of the proposed SBBI is improved by controlling main inverter’s supply (VDD and Gnd) and body-bias voltages, by using stacked and feedback inverters. The novelty of our proposed SBBI is in the combination of the conventional low-voltage circuit design techniques and its demonstration at extremely low supply voltage. Simulated and measured results in a 0.18-μm CMOS process with deep n-well option demonstrated that the proposed ROSC can operate at extremely low supply voltage of 35 mV and generate a clock with an 88% voltage swing from an input supply voltage of 50 mV. To the best of the authors’ knowledge, this is the lowest supply voltage CMOS ring oscillator ever reported.

A self-bias NAND gate and its application to non-overlapping clock generator for extremely low-voltage CMOS LSIs

Abstract: This paper presents a self-bias NAND (SBNAND) gate and its application to a non-overlapping (NOL) clock generator for extremely low-voltage CMOS LSIs. The SBNAND, consisting of a main NAND gate and feedback inverter, improves the output performance at extremely low supply voltage V DD by controlling the body-bias voltages V BS of the main NAND gate. Measurements of a proof-of-concept chip demonstrated that our proposed NOL clock generator using SBNANDs can operate at the extremely low V DD of 60 mV.