Compressing attributes on 3D point clouds such as colors or normal directions has been a challenging problem, since these attribute signals are unstructured. In this paper, we propose to compress such attributes with graph transform. We construct graphs on small neighborhoods of the point cloud by connecting nearby points, and treat the attributes as signals over the graph. The graph transform, which is equivalent to Karhunen-Loeve Transform on such graphs, is then adopted to decorrelate the signal. Experimental results on a number of point clouds representing human upper bodies demonstrate that our method is much more efficient than traditional schemes such as octree-based methods.

/pdf/point-cloud-attribute-compression-with-graph-transform-16ofwgsihs.pdf

Point cloud attribute compression with graph transform

This paper presents bandgap reference (BGR) and sub-BGR circuits for nanowatt LSIs. The circuits consist of a nano-ampere current reference circuit, a bipolar transistor, and proportional-to-absolute-temperature (PTAT) voltage generators. The proposed circuits avoid the use of resistors and contain only MOSFETs and one bipolar transistor. Because the sub-BGR circuit divides the output voltage of the bipolar transistor without resistors, it can operate at a sub-1-V supply. The experimental results obtained in the 0.18-μm CMOS process demonstrated that the BGR circuit could generate a reference voltage of 1.09 V and the sub-BGR circuit could generate one of 0.548 V. The power dissipations of the BGR and sub-BGR circuits corresponded to 100 and 52.5 nW.

1.2-V Supply, 100-nW, 1.09-V Bandgap and 0.7-V Supply, 52.5-nW, 0.55-V Subbandgap Reference Circuits for Nanowatt CMOS LSIs

This paper presents a subthreshold voltage reference in which the output voltage is scalable depending on the number of stacked PMOS transistors. A key advantage is that its output voltage can be higher than that obtained with conventional low-power subthreshold voltage references. The proposed reference uses native NMOS transistors as a current source and develops a reference voltage by stacking one or more PMOS transistors. The temperature coefficient of the reference voltage is compensated by setting the size ratio of the native NMOS and stacked pMOS transistors to cancel temperature dependence of transistor threshold voltage and thermal voltage. Also, the transistor size is determined considering the trade-off between diode current between n-well and p-sub and process variation. Prototype chips are fabricated in a 0.18- $\mu \text{m}$ CMOS process. Measurement results from three wafers show $3\sigma $ inaccuracy of ±1.0% from 0 °C to 100 °C after a single room-temperature trim. The proposed voltage reference achieves a line sensitivity of 0.31%/V and a power supply rejection of −41 dB while consuming 35 pW from 1.4 V at room temperature.

A Subthreshold Voltage Reference With Scalable Output Voltage for Low-Power IoT Systems

This paper proposes a novel CMOS bandgap reference (BGR) with high-order curvature-compensation by using MOS transistors operating in weak inversion region. The mechanism of the proposed curvature-compensation technique is analyzed thoroughly and the corresponding BGR circuit was implemented in standard CMOS 0.18 μm technology. The experimental results show that the proposed BGR achieves 4.5 ppm/°C over the temperature range of -40°C to 120°C at 1.2 V supply voltage. It consumes only 36 μA. In addition, it achieves line regulation performance of 0.054%/V. It is suitable for low-power applications requiring references with high precision.

A Novel 1.2–V 4.5-ppm/°C Curvature-Compensated CMOS Bandgap Reference

This paper presents a level shifter circuit capable of handling extremely low-voltage inputs. The circuit has a distinctive current generation scheme using a logic error correction circuit that works by detecting the input and output logic levels. The proposed level shifter circuit can convert low-voltage digital input signals into high-voltage digital output signals. The circuit achieves low-power operation because it dissipates operating current only when the input signal changes. Measurement results demonstrated that the circuit can convert a 0.23-V input signal into a 3-V output signal. The power dissipation was 58 nW for a 0.4-V 10-kHz input pulse.

A Low-Power Level Shifter With Logic Error Correction for Extremely Low-Voltage Digital CMOS LSIs

We have developed a nano-ampere CMOS current reference circuit that is tolerant to threshold voltage variations. This paper describes the circuit and its temperature dependence control technique for ultra-low power LSIs. Because the generated current increases with temperature, we propose a temperature dependence control architecture for a reference current by using the different temperature characteristics of “electron” and “hole” mobilities. Experiment results demonstrated that the circuit can generate a temperature compensated reference current of 9.95 nA and that the temperature dependence of the output reference current can be controlled by using the different temperature dependences of electron and hole mobilities. The temperature dependence controllability was 8.57 pA/˚C·bit and its total current dissipation was 68.1 nA.

A nano-ampere current reference circuit and its temperature dependence control by using temperature characteristics of carrier mobilities

This paper proposes CMOS bandgap reference (BGR) and sub-BGR circuits without resistors for nanowatt power LSIs. The BGR circuit consists of a nano-ampere current reference, a bipolar transistor, and a proportional to absolute temperature (PTAT) voltage generator. The PTAT voltage generator consists of source-coupled differential pairs and generates a positive temperature dependent voltage. The PTAT voltage generator compensates for negative temperature dependence of a base-emitter voltage in a PNP bipolar transistor. The circuit generates a bandgap voltage of silicon. The sub-BGR circuit uses a voltage divider to generate low-voltage sub-bandgap reference. Experimental results demonstrated that the BGR and sub-BGR circuits can generate a 1.18-V and 553-mV reference voltages, respectively. The power dissipation of the BGR and sub-BGR circuits were 108-nW and 110-nW, respectively.

A CMOS bandgap and sub-bandgap voltage reference circuits for nanowatt power LSIs

We present a low-power and low-energy level shifter (LS) circuit that can convert extremely low-voltage input into high-voltage output. The proposed LS consists of a pre-amplifier (pre-AMP) and an output latch. The pre-AMP employs a logic error correction circuit, which generates an operating current for the pre-AMP only when the logic levels of the input and output do not correspond. The pre-AMP generates complementary amplified signals, and the latch converts them into full-swing outputs. Measurement results demonstrated that the proposed LS fabricated in 0.18- $\mu \text{m}$ CMOS technology was able to convert an extremely low-voltage input of 80 mV into a high-voltage output of 1.8 V. The energy of the proposed LS was 0.35 pJ, when the low supply voltage, high supply voltage, and input pulse frequency were 0.4 V, 1.8 V, and 10 kHz, respectively. The static power dissipation without input was 0.12 nW.

/pdf/an-80-mv-to-1-8-v-conversion-range-low-energy-level-shifter-1k2htvwho6.pdf

Masahiro Numa

Papers

1.2-V Supply, 100-nW, 1.09-V Bandgap and 0.7-V Supply, 52.5-nW, 0.55-V Subbandgap Reference Circuits for Nanowatt CMOS LSIs

A Low-Power Level Shifter With Logic Error Correction for Extremely Low-Voltage Digital CMOS LSIs

A nano-ampere current reference circuit and its temperature dependence control by using temperature characteristics of carrier mobilities

A CMOS bandgap and sub-bandgap voltage reference circuits for nanowatt power LSIs

An 80-mV-to-1.8-V Conversion-Range Low-Energy Level Shifter for Extremely Low-Voltage VLSIs