A planar concentrator solar power module has a planar base, an aligned array of linear photovoltaic cell circuits on the base and an array of linear Fresnel lenses or linear mirrors for directing focused solar radiation on the aligned array of linear photovoltaic cell circuits. The cell circuits are mounted on a back panel which may be a metal back plate. The cell circuit area is less than a total area of the module. Each linear lens or linear mirror has a length greater than a length of the adjacent cell circuit. The cell circuit may have cells mounted in shingle fashion to form a shingled-cell circuit. In an alternative module, linear extrusions on the circuit element have faces for mounting the linear mirrors for deflecting sun rays impinging on each mirror onto the shingled-cells. The linear extrusions are side-wall and inner extrusions with triangular cross-sections. The circuit backplate is encapsulated by lamination for weather protection. The planar module is generally rectangular with alternating rows of linear cell circuits and linear lenses or linear mirrors.

Planar solar concentrator power module

A semiconductor chip carrying integrated circuits has lead lines terminating in conductive terminal pads exposed to the exterior through openings in a passivation layer. The pads include pedestals or bumps extending up from them. Each of the pedestals includes a thin metallic adhesion layer deposited on the pad. A thick metallic layer of aluminum or an alloy of aluminum is deposited upon said thin metallic adhesion layer. The thick metallic layer includes at least one metal selected from the group consisting of aluminum, aluminum plus a small percentage of Cu, Ni, Si, or Fe. Several other alternative metals can be added to aluminum to form an alloy. The thick metallic layer forms the bulk of the height of the pedestal. An adhesion layer is deposited on the bump of aluminum composed of a thin film of titanium or chromium. A barrier layer is deposited on the adhesion layer composed of copper, nickel, platinum, palladium or cobalt. A noble metal consisting of gold, palladium, or platinum is deposited on the barrier layer. In a variation of the top surface, a thick cap of a reworkable bonding metal is deposited above the metallic bump as the top surface of said bump. The bump can be composed of a number of metals such as gold, copper, nickel and aluminum in this case with aluminum being preferred. In place of the adhesion and barrier metals one can employ a layer of titanium nitride deposited on said thick layer of metal.

Aluminum bump, reworkable bump, and titanium nitride structure for tab bonding

The present invention includes an integral copper column with a solder bump flip chip An integrated circuit chip is provided having an electrical circuit and including at least two contact pads A thin layer of barrier metallization is provided over the contact pads A support substrate is provided having a circuit layer with raised features that include copper traces A solder bump connects the contact pad on the integrated circuit chip and the raised features of the flex circuit to provide an integral copper column with a solder bump flip chip

Integral copper column with solder bump flip chip

In a disclosed COC type semiconductor device, a bump electrode (21) of a second semiconductor chip (2) is joined to a first semiconductor chip (1) having a bump electrode (11) formed thereon The bump electrodes (11) and (21) of the respective first and second semiconductor chips (1) and (2) are both made of first metal such as Au having a relatively high melting point, while a joining portion of these bump electrodes (11) and (21) is formed of an alloy layer (3) of the first metal and second metal, which second metal is made of such a material that can melt at a lower temperature than the melting point of the first metal to be alloyed with it As a result, in the COC type semiconductor device, when interconnecting a plurality of semiconductor chips, their electrode terminals can be joined to each other without deteriorating the properties of these chips owing to the high temperature applied thereon

Semiconductor device and its manufacturing method

A flip chip interconnection structure is formed by mechanically interlocking joining surfaces of a first and second element. The first element, which may be a bump on an integrated circuit chip, includes a soft, deformable material with a low yield strength and high elongation to failure. The surface of the second element, which may for example be a substrate pad, is provided with asperities into which the first element deforms plastically under pressure to form the mechanical interlock.

Flip chip interconnection structure

A method for flip-chip bonding an integrated circuit die to a substrate. A substrate (21) having conductive bonding areas (22) coated with tin (23) is secured to a bottom end effector of a flip-chip bonding apparatus. An integrated circuit die (26) having gold bumps (28) is secured to a die tool of the flip-chip bonding apparatus. A gold-tin eutectic bond is formed between the integrated circuit die (26) and the conductive bonding areas (22) of the substrate (21).

Method for forming a flip-chip bond from a gold-tin eutectic

A device having a plurality of columnar structures comprised of a solderable metal disposed on a supporting base is used to remove solder from a substrate surface. Capillary action takes place in the area between the columns, thus removing the solder from the substrate surface. The present invention may be fabricated by forming columnar structures on the supporting base through mask openings or by etching a solderable metal layer into columnar structures. A standoff may be built into the device to prevent solder residue from remaining on the substrate surface between solder pads and to allow a controllable amount of solder to be left on the substrate surface.

Device for solder removal

An elevated bonding pad suitable for wire or lead frame attachment and having an insulating layer completely over its outer periphery. The structure simplifies the processing required to form an elevated bonding pad, and serves to protect the periphery against bonding damage, and provides protection against corrosion of the bonded encapsulated semiconductor unit.

Elevated edge-protected bonding pedestals for semiconductor devices

Structure and process for providing a hard metallic leadframe directly bonded to a semiconductor chip without the necessity for solder or soft intermediate leadframes. The structure provides a strong bond at the semiconductor chip with the possibility for multiple simultaneous lead attachment of a leadframe having sufficient strength to serve as the external leads. The bonded structure may be conventionally encapsulated in a plastic or ceramic package, or may be glassed to provide a minimum volume hermetic chip.

Thomas A. Scharr

Papers

Method for forming a flip-chip bond from a gold-tin eutectic

Device for solder removal

Elevated edge-protected bonding pedestals for semiconductor devices

Semiconductor chip with direct-bonded external leadframe