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Toshiyuki Watanabe

Researcher at Toshiba

Publications -  31
Citations -  449

Toshiyuki Watanabe is an academic researcher from Toshiba. The author has contributed to research in topics: Lens (optics) & Signal. The author has an hindex of 10, co-authored 31 publications receiving 449 citations.

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Patent

Pattern inspection apparatus with corner rounding of reference pattern data

TL;DR: In this article, a pattern inspection apparatus for comparing/collating a test target pattern with a corresponding design pattern to detect the presence/absence of a defect which is present in the test target patterns includes a bit pattern generating circuit for developing the data of the design pattern into bits.
Patent

Pattern inspection apparatus

TL;DR: In this article, a computer detects presence of a plurality of repeated pattern areas from layout information contained in the designed pattern data, reads the arrangement, the number, the dimension and the repeated pitch of the repeated pattern area, and automatically fetches an inspection area of the die-to-die comparison method.
Patent

Sample inspection apparatus and sample inspection method

TL;DR: In this paper, a method of inspecting a sample on which a pattern relating to fabrication of a semiconductor device is formed is presented, where a light radiation unit, an acquiring unit, storage unit, a template, a calculation unit, correction unit, defect detection unit, and an output unit are provided.
Patent

Method of and device for detecting displacement of paper sheets

TL;DR: In this paper, the displacement detection device includes photo sensors which detect the leading edge of the paper sheet that is being transported, and a photo position detector which detects the distance from the conveyer belt to the side edge of said paper sheet.
Patent

Method of inspecting a pattern formed on a sample for a defect, and an apparatus thereof

TL;DR: In this paper, a pattern defect inspection apparatus consisting of a light irradiating portion, a light receive element, light receiving element amplifier, a preparation portion for preparing multi-valued design pattern image data, an offset adjusting portion and an inspecting portion.