This tutorial presents an overview of the technological advances in millimeter-wave (mm-wave) circuit components, antennas, and propagation that will soon allow 60-GHz transceivers to provide multigigabit per second (multi-Gb/s) wireless communication data transfers in the consumer marketplace. Our goal is to help engineers understand the convergence of communications, circuits, and antennas, as the emerging world of subterahertz and terahertz wireless communications will require understanding at the intersections of these areas. This paper covers trends and recent accomplishments in a wide range of circuits and systems topics that must be understood to create massively broadband wireless communication systems of the future. In this paper, we present some evolving applications of massively broadband wireless communications, and use tables and graphs to show research progress from the literature on various radio system components, including on-chip and in-package antennas, radio-frequency (RF) power amplifiers (PAs), low-noise amplifiers (LNAs), voltage-controlled oscillators (VCOs), mixers, and analog-to-digital converters (ADCs). We focus primarily on silicon-based technologies, as these provide the best means of implementing very low-cost, highly integrated 60-GHz mm-wave circuits. In addition, the paper illuminates characterization techniques that are required to competently design and fabricate mm-wave devices in silicon, and illustrates effects of the 60-GHz RF propagation channel for both in-building and outdoor use. The paper concludes with an overview of the standardization and commercialization efforts for 60-GHz multi-Gb/s devices, and presents a novel way to compare the data rate versus power efficiency for future broadband devices.

http://faculty.poly.edu/~tsr/wp-content/uploads/publications/abstract17.pdf

State of the Art in 60-GHz Integrated Circuits and Systems for Wireless Communications

An impedance matching circuit includes a conductor line having an input port and an output port, a ground conductor, a tunable dielectric material positioned between a first section of the conductor line and the ground conductor, a non-tunable dielectric material positioned between a second section of the conductor line and the ground conductor, and means for applying a DC voltage between the conductor line and the ground conductor. The impedance matching circuit may alternatively include a first planar ground conductor, a second planar ground conductor, a strip conductor having an input port and an output port, and positioned between the first and second planar ground conductors to define first and second gaps, the first gap being positioned between the strip conductor and the first planar ground conductor and the second gap being positioned between the strip conductor and the second planar ground conductor. A non-tunable dielectric material supports the first and second planar ground conductors and the strip conductor in the same plane. A connection is provided for applying a DC voltage between the strip conductor and the first and second planar ground conductors. A plurality of tunable dielectric layer sections are positioned between the strip conductor and the first and second planar ground conductors so as to bridge the gaps between the said first and second planar ground conductors and the strip conductor at a plurality of locations, leaving non-bridged sections in between, defining a plurality of alternating bridged and non-bridged co-planar waveguide sections.

Tunable microwave devices with auto-adjusting matching circuit

A fully integrated switched-capacitor power amplifier (SCPA) utilizes switched-capacitor techniques in an EER/Polar architecture. It operates on the envelope of a nonconstant envelope modulated signal as an RF-DAC in order to amplify the signal efficiently. The measured maximum output power and PAE are 25.2 dBm and 45%, respectively. When amplifying an 802.11g 64-QAM orthogonal frequency-division multiplexing (OFDM) signal, the measured error vector magnitude is 2.6% and the average output power and power-added efficiencies are 17.7 dBm and 27%, respectively.

A Switched-Capacitor RF Power Amplifier

A system that incorporates teachings of the present disclosure may include, for example, a non-transitory computer-readable storage medium including computer instructions to obtain at least one operational parameter associated with a communication device and to adjust a steerable antenna of the communication device when the communication device does not satisfy an impedance threshold, where the satisfying of the impedance threshold is determined based on the at least one operational parameter. Additional embodiments are disclosed.

Method and apparatus for tuning a communication device

A method and apparatus for use in a digitally tuning a capacitor in an integrated circuit device is described. A Digitally Tuned Capacitor DTC is described which facilitates digitally controlling capacitance applied between a first and second terminal. In some embodiments, the first terminal comprises an RF+ terminal and the second terminal comprises an RF− terminal. In accordance with some embodiments, the DTCs comprise a plurality of sub-circuits ordered in significance from least significant bit (LSB) to most significant bit (MSB) sub-circuits, wherein the plurality of significant bit sub-circuits are coupled together in parallel, and wherein each sub-circuit has a first node coupled to the first RF terminal, and a second node coupled to the second RF terminal. The DTCs further include an input means for receiving a digital control word, wherein the digital control word comprises bits that are similarly ordered in significance from an LSB to an MSB.

Method and apparatus for use in digitally tuning a capacitor in an integrated circuit device

This paper presents an H-bridge class-D power amplifier (PA) for digital pulse modulation transmitters. The class-D amplifier can be driven by two-or three-level digital signals generated by a delta-sigma modulator (DSM) and provides a linear microwave output after filtering. Within the amplifier, the pull-up and pull-down devices are driven separately to improve the amplifier efficiency by minimizing the loss associated with shoot-through current. The H-bridge class-D PA system was tested with code-division multiple-access IS-95 signals at 800 MHz. Using binary DSM signals, a drain efficiency of 31% was achieved with an output power of 15 dBm and an adjacent channel power ratio of -43 dBc. With three-level DSM signals, a drain efficiency of 33% was achieved at same output power. An analysis of the factors governing amplifier efficiency is provided.

Design of H-Bridge Class-D Power Amplifiers for Digital Pulse Modulation Transmitters

A tunable matching network has been developed to adaptively correct antenna impedance mismatch for CDMA transceivers. The tuning network consists of two L structures in cascade and is implemented with silicon-on-sapphire switches, fixed capacitors and inductors. Experimental results show the matching network can correct antenna impedance mismatch over a wide range. It has adequate linearity for CDMA applications and an insertion loss of 0.4 dB. A simple method has also been developed to measure the antenna load impedance based on the measurement of the envelope voltages at three points along a section of transmission line. This method is independent of input power to the antenna and source impedance seen by the antenna. This method could be integrated with the tunable matching network to correct the load impedance mismatch for an adaptive transceiver.

Antenna impedance mismatch measurement and correction for adaptive CDMA transceivers

Design considerations are discussed for current-mode class-D (CMCD) microwave power amplifiers. Factors affecting amplifier efficiency are described analytically and via simulation. Amplifiers are reported that incorporate parallel LC resonators alongside the switching transistors. To reduce parasitic resistance, bond-wires were utilized to implement a high Q inductor in the LC resonator. An experimental CMCD amplifier based on GaAs HBTs is reported, with collector efficiency of 78.5% at an output power of 29.5 dBm (0.89 W) at 700 MHz.

Design of high-efficiency current-mode class-D amplifiers for wireless handsets

This letter presents a CMOS outphasing class-D power amplifier (PA) with a Chireix combiner. Two voltage-mode class-D amplifiers used in the outphasing system were designed and implemented with a 0.18-mum CMOS process. By applying the Chireix combiner technique, drain efficiency of the outphasing PA for CDMA signals was improved from 38.6% to 48% while output power was increased from 14.5 to 15.4 dBm with an adjacent channel power ratio of -45 dBc.

CMOS Outphasing Class-D Amplifier With Chireix Combiner

This paper presents an H-bridge class-D power amplifier for digital pulse modulation transmitters. For the proposed class-D amplifier, the drivers of the pull-up and pulldown devices were separated to minimize power loss associated with the shoot-through currents. The amplifier can be driven by binary digital signals generated by a delta-sigma modulator directly. The H-bridge class-D power amplifier system was tested with CDMA IS-95 signals at 800 MHz. The drain efficiency of 31% was achieved with output power of 15 dBm and an ACPR of -43 dBc.

Tsai-Pi Hung

Papers

Design of H-Bridge Class-D Power Amplifiers for Digital Pulse Modulation Transmitters

Antenna impedance mismatch measurement and correction for adaptive CDMA transceivers

Design of high-efficiency current-mode class-D amplifiers for wireless handsets

CMOS Outphasing Class-D Amplifier With Chireix Combiner

H-Bridge Class-D Power Amplifiers for Digital Pulse Modulation Transmitters