A method and system is provided for programming the digital filter compensation coefficients of a digitally controlled switched mode power supply within a distributed power system. The distributed power system comprises a plurality of point-of-load (POL) regulators each comprising at least one power switch adapted to convey power to a load and a digital controller adapted to control operation of the power switch responsive to a feedback measurement. The digital controller further comprises a digital filter having a transfer function defined by plural filter coefficients. A serial data bus operatively connects each of the plurality of POL regulators. A system controller is connected to the serial data bus and is adapted to communicate digital data to the plurality of POL regulators via the serial data bus. The digital data includes programming data for programming the plural filter coefficients. The system controller further comprises a user interface adapted to receive the programming data therefrom.

Method and system for communicating filter compensation coefficients for a digital power control system

A power control system comprises a plurality of POL regulators, at least one serial data bus operatively connecting the plurality of POL regulators, and a system controller connected to the serial data bus and adapted to send and receive digital data to and from the plurality of POL regulators. The serial data bus further comprises a first data bus carrying programming and control information between the system controller and the plurality of POL regulators. The serial data bus may also include a second data bus carrying fault management information between the system controller and the plurality of POL regulators. The power control may also include a front-end regulator providing an intermediate voltage to the plurality of POL regulators on an intermediate voltage bus.

Method and system for controlling and monitoring an array of point-of-load regulators

Multiple designs, systems, methods and processes for controlling a system or plant using an extended active disturbance rejection control (ADRC) based controller are presented. The extended ADRC controller accepts sensor information from the plant. The sensor information is used in conjunction with an extended state observer in combination with a predictor that estimates and predicts the current state of the plant and a co-joined estimate of the system disturbances and system dynamics. The extended state observer estimates and predictions are used in conjunction with a control law that generates an input to the system based in part on the extended state observer estimates and predictions as well as a desired trajectory for the plant to follow.

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Extended active disturbance rejection controller

A system and method for providing interleaving point-of-load (POL) regulators such that each regulator's switching cycle is phase displaced with respect to those of other POL regulators in the array is disclosed. As a result, the aggregate input and/or output reflected ripple and noise of the input, output, or both is reduced. Each regulator in the array is associated with an unique address. A serial data-line writes the phase spacing programmed to each addressable POL regulator in the array. The present invention permits phase displacement of POL regulators without limitation to the input and output voltages of each of the regulators in the array. The array of POL regulators may also operate in a phase displaced mode with only a single control line. The need for separate controllers and multiple control lines is thereby eliminated.

System and method for interleaving point-of-load regulators

A pulse width modulation system for use in a switching power supply circuit provides high-resolution pulse width modulated signals. The pulse width modulation system is configured to receive a control signal comprising a (m+n)-bit binary word and to provide a pulse width modulated signal with a predetermined average duty cycle having a resolution of substantially 2-(m+n). The pulse width modulation system includes a timing circuit for providing 2m timing signals, a dithering circuit, and a signal generator. Upon receiving the control signal, the dithering circuit is configured to provide a modified control signal, which comprises a series of up to 2n m-bit binary words. The signal generator is configured to receive the timing signals and the modified control signal and to provide the pulse width modulated signal having a duty cycle, which, when averaged over 2n timing cycles, is approximately equal to the predetermined average duty cycle. The pulse width modulated signal is used by a switching power supply circuit to control at least one power switching device.

System and method for providing digital pulse width modulation

A method for tuning P-, I- and D-type controller which is used in combination or individually to control a variable y of a process in a feedback system, which comprises making the integrating (I) and derivative (D) unit of the controller inoperative; increasing the proportional control gain K until a desired oscillation is obtained; calculating the ultimate gain Ku and ultimate period Tu in accordance with the amplitude and period measured from the oscillation; and setting the parameters of the PID controller in dependence upon the Ku and Tu values, wherein the control signal U resulting from the controller gain K is restricted to a range from a lower limit Umin to an upper limit Umax to avoid the system being operated in an unstable condition. An apparatus suitable for performing the present method is also disclosed.

Tseng Wen-Liang

Papers

Method and an apparatus for PID controller tuning