T
Tung-Ying Hsieh
Researcher at National Tsing Hua University
Publications - 21
Citations - 206
Tung-Ying Hsieh is an academic researcher from National Tsing Hua University. The author has contributed to research in topics: Layer (electronics) & Logic gate. The author has an hindex of 9, co-authored 20 publications receiving 182 citations.
Papers
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Proceedings ArticleDOI
Record-high 121/62 μA/μm on-currents 3D stacked epi-like Si FETs with and without metal back gate
Chih-Chao Yang,Szu-Hung Chen,Jia-Min Shieh,Wen-Hsien Huang,Tung-Ying Hsieh,Chang-Hong Shen,Tsung-Ta Wu,Hsing-Hsiang Wang,Yao-Jen Lee,Fu-Ju Hou,Ci-Ling Pan,Kuei-Shu Chang-Liao,Chenming Hu,Fu-Liang Yang +13 more
TL;DR: In this paper, a sequential layered integration technology that can fabricate 3D stackable epi-like Si FETs with and without metal back gate (MBG) under sub-400°C is proposed.
Proceedings ArticleDOI
Low-cost and TSV-free monolithic 3D-IC with heterogeneous integration of logic, memory and sensor analogy circuitry for Internet of Things
Tsung-Ta Wu,Chang-Hong Shen,Jia-Min Shieh,Wen-Hsien Huang,Hsing-Hsiang Wang,Fu-Kuo Hsueh,Hisu-Chih Chen,Chih-Chao Yang,Tung-Ying Hsieh,Bo-Yuan Chen,Yu-Shao Shiao,Chao-Shun Yang,Guo-Wei Huang,Kai-Shin Li,Ting-Jen Hsueh,Chien-Fu Chen,Wei-Hao Chen,Fu-Liang Yang,Meng-Fan Chang,Wen-Kuan Yeh +19 more
TL;DR: This CO2-FIR-LA based TSV-free 3D Monolithic IC can realize low cost, small footprint, and highly heterogeneous integration for Internet of Things.
Journal ArticleDOI
High Performance and Low power Monolithic Three-Dimensional Sub-50 nm Poly Si Thin film transistor (TFTs) Circuits
Tsung-Ta Wu,Wen-Hsien Huang,Chih-Chao Yang,Hung-Chun Chen,Tung-Ying Hsieh,Wei-Sheng Lin,Ming-Hsuan Kao,Chiu-Hao Chen,Jie-Yi Yao,Yi-Ling Jian,Chiung-Chih Hsu,Kun-Lin Lin,Chang-Hong Shen,Yu-Lun Chueh,Jia-Min Shieh +14 more
TL;DR: The advanced 3D architecture with closely spaced inter-layer dielectrics (ILD) enables high-performance stackable MOSFETs and SRAM for power-saving IoT/mobile products at a low cost or flexible substrate.
Proceedings ArticleDOI
First fully functionalized monolithic 3D+ IoT chip with 0.5 V light-electricity power management, 6.8 GHz wireless-communication VCO, and 4-layer vertical ReRAM
Fu-Kuo Hsueh,Chang-Hong Shen,Jia-Min Shieh,Kai-Shin Li,Hsiu-Chih Chen,Wen-Hsien Huang,Hsing-Hsiang Wang,Chih-Chao Yang,Tung-Ying Hsieh,Chang-Hsien Lin,Bo-Yuan Chen,Yu-Shao Shiao,Guo-Wei Huang,Oi-Ying Wong,Po-Hung Chen,Wen-Kuan Yeh +15 more
TL;DR: This unique TSV-free monolithic 3D 3D+IC process provides the superiority in 3D hetero-integration; it successfully integrate these circuits in a low cost, small footprint, fully functionalized 3D+ IoT chip.
Journal ArticleDOI
Network Signatures of IgG Immune Repertoires in Hepatitis B Associated Chronic Infection and Vaccination Responses.
Ya-Hui Chang,Hui-Chung Kuan,Tung-Ying Hsieh,K. H. Ma,Chung-Hsiang Yang,Wei-Bin Hsu,Wei-Bin Hsu,Shih-Feng Tsai,Anne Chao,Hong-Hsing Liu +9 more
TL;DR: Next-generation sequencing was used to characterize the CDR-H3 sequences in paired siblings of 4 families in which only one member of each pair had chronic HBV infection and revealed a huge network of sequence-related CDR -H3 clones found almost exclusively among carriers.