The electret induced hysteresis was studied in sol-gel silica films that result in higher drain currents and improved device performance in pentacene field-effect transistors. Vacuum and ambient condition studies of the hysteresis behavior and capacitance-voltage characteristics on single layer and varying thicknesses of bilayer dielectrics confirmed that blocking layers of thermal oxide could effectively eliminate the electret induced hysteresis, and that thin (25nm) sol-gel silica dielectrics enabled elimination of nanopores thus realizing stable device characteristics under ambient conditions.

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Electret mechanism, hysteresis, and ambient performance of sol-gel silica gate dielectrics in pentacene field-effect transistors

Low-temperature-processed inorganic gate dielectrics were employed here to yield high-performance organic field-effect transistors (FETs) on flexible plastic substrates. SiNx dielectrics deposited at room temperature and SiNx/sol-gel silica dielectric bilayer processed below 100degC were demonstrated to be viable gate dielectric materials, with the latter yielding effective field-effect mobilities of ~ 1 cm2/Vldrs at operating voltages of under -5 V with an on-off current ratio in the range of 105. The enhancement in device performance was attributed to an improved semiconductor-dielectric interface and a larger grain size of the pentacene deposited on the bilayer dielectrics. The flexibility of FETs fabricated on polyester substrates was also demonstrated with insignificant changes in device performance upon subjecting the devices to strains of 2.27%.

Low-Temperature-Processed Inorganic Gate Dielectrics for Plastic-Substrate-Based Organic Field-Effect Transistors

The dielectric-semiconductor interfacial interactions critically influence the morphology and molecular ordering of the organic semiconductor molecules, and hence have a profound influence on mobility, threshold voltage, and other vital device characteristics of organic field-effect transistors. In this study, p-channel small molecule/polymer (evaporated pentacene and spin-coated poly(3,3''';didodecylquarterthiophene)- PQT) and n-channel fullerene derivative ({6}-1-(3-(2-thienylethoxycarbonyl)-propyl)-{5}-1-phenyl-[5,6]-C61 - TEPP-C61) show a significant enhancement in device mobilities ranging from ∼6 to ∼45 times higher for all classes of semiconductors deposited on sol-gel silica gate-dielectric than on pristine/octyltrichlorosilane (OTS)-treated thermally grown silica. Atomic force microscopy, synchrotron X-ray diffraction, photoluminescence/absorption, and Raman spectroscopy studies provide comprehensive evidences that sol-gel silica dielectrics-induced enhancement in both p- and n-channel organic semiconductors is attributable to better molecular ordering/packing, and hence reduced charge trapping centers due to lesser structural defects at the dielectric-semiconductor interface.

Enhancement of Carrier Mobilities of Organic Semiconductors on Sol–Gel Dielectrics: Investigations of Molecular Organization and Interfacial Chemistry Effects

High-performance pentacene-based thin-film transistors and inverters with solution-processed barium titanate (BTO) insulators are demonstrated. The current-voltage characteristics of the transistors show high mobility of 9.53 cm2 V-1 s-1 at smaller VG = -3.5 V and VD = -5 V, a low threshold voltage of -1.5 V, and a subthreshold slope of 599 mV/dec. Large grain and small crystalline sizes are observed from atomic force microscopy images and X-ray diffraction analysis of pentacene films. The results are verified through Raman spectroscopy and a theoretical Marcus-Hush equation to understand the higher intermolecular coupling, resulting in easier carrier transports in pentacene molecules. In order to investigate the behavior of high-permittivity materials of BTO insulators in a logic circuit, simple and low-operating-voltage inverters are fabricated, and the gain is approximately 8.76 under a small operating voltage range from 0 to -5 V.

High-Performance Pentacene-Based Thin-Film Transistors and Inverters With Solution-Processed Barium Titanate Insulators

Controlling of photoresponse properties of pentacene thin film phototransistors by dielectric layer thickness and channel widths

Pentacene films grown on sol-gel silica dielectrics showed a significant enhancement in field effect mobility, threshold voltages, and subthreshold swings. This letter investigates the contributing factors for the enhanced device characteristics. The smoother and more hydrophobic film surfaces of sol-gel silica (rms roughness of ∼1.9A and water contact angle of ∼75°) induced larger pentacene grains, yielding mobilities in excess of ∼1cm2∕Vs at an operating voltage of −20V. Different sol-gel silica film thicknesses showed similar trends in improved performances, indicating that this phenomenon is clearly a semiconductor-dielectric interface phenomenon rather than a bulk dielectric effect.

Investigations of enhanced device characteristics in pentacene-based field-effect transistors with sol-gel interfacial layer

Multi-frequency transconductance technique is successfully applied in this work for the first time for interface characterization of OFETs. Standard charge pumping measurements are used on silicon MOSFETs for the validation of MFT technique. The method is implemented on pentacene as well as the P3HT based OFETs with SiO2 as the gate dielectric. Our results show interface state densities in the range of 1012/cm2/eV for both the samples. The P3HT films are also shown to have additional trap centres which respond to frequencies above 100 kHz. Our results therefore clearly indicate that the MFT technique is indeed a highly useful technique for interface characterization of OFETs.

V. R. Rao

Papers

Investigations of enhanced device characteristics in pentacene-based field-effect transistors with sol-gel interfacial layer

A Simple and Direct Method for Interface Characterization of OFETs