This paper analyzes the effects of unbalanced voltage on doubly fed induction generators. It also presents a novel control strategy based on direct power control (DPC+) applied to this type of generators, predominant in wind energy applications, that enables them to work under perturbed conditions and achieve optimum results. Although the technique can be implemented to control both rotor converters and grid converters, we will hereby exemplify the former which regulates stator active and reactive power. The results obtained with DPC+ are then compared through experimental tests to indicate that the technique is suitable and achieves good dynamic responses while controlling current distortion, power or torque oscillations. The validation of results has been performed through experimental tests on a 20-kW generator.

Direct Power Control Applied to Doubly Fed Induction Generator Under Unbalanced Grid Voltage Conditions

An essential requirement for a high-performance dual active bridge (DAB) dc-dc converter is to rapidly and accurately maintain its DC output voltage under all operating conditions This paper uses a novel harmonic modeling strategy to create a linearized dynamic model of a DAB that accurately identifies its transient response to both a reference voltage change and an output load-current change Using this model, a feedforward compensation strategy is presented that significantly improves the DAB's transient response to an output load change The transient performance is then further enhanced by analytically compensating for the nonlinear dead-time distortion that is caused by the converter switching processes The resultant control system achieves rapid and precise output voltage regulation for both reference voltage and output load changes The theoretical analysis is confirmed by both matching simulation and experimental investigations

Enhanced Load Step Response for a Bidirectional DC–DC Converter

Bulky electrolytic capacitors, which are often needed in dc systems to filter out voltage ripples, considerably reduce power density and system reliability. In this paper, a ripple eliminator, which is a bidirectional buck–boost converter terminated with an auxiliary capacitor, is adopted to replace bulky capacitors in dc systems. The voltage ripples on the terminals (i.e., the dc bus) can be transferred to the auxiliary capacitor, and the ripples on the auxiliary capacitor can vary in a wide range. Moreover, the average voltage of the auxiliary capacitor can be controlled either lower or higher than the dc-bus voltage, which offers a wide operational range for the ripple eliminator and also the possibility of further reducing the auxiliary capacitance. Hence, the total capacitance required can be much smaller than the originally needed. After proposing a control strategy to transfer the voltage ripples to the auxiliary capacitor, three control strategies are proposed to regulate the auxiliary-capacitor voltage to maintain proper operation. Intensive experimental results are presented to demonstrate the performance.

https://www.sheffield.ac.uk/polopoly_fs/1.543742!/file/IEEETIE_RippleEliminatorDCM.pdf

Ripple Eliminator to Smooth DC-Bus Voltage and Reduce the Total Capacitance Required

Accurate identification of a DC-link ripple current is an important part of switched power-converter design, since the spectral content of this current impacts on DC bus-capacitor lifetime, the stability of the converter control, and the electromagnetic-interference (EMI) performance of the system. Conventionally, the RMS magnitude of the ripple current is used to evaluate this impact, but this approach does not readily differentiate between pulsewidth-modulation (PWM) strategies, and can be challenging to evaluate for more complex converter topologies. This paper presents a new generalized approach that analytically determines the harmonic spectrum of the DC-link and DC-bus capacitor currents for any voltage-source switched converter topology. The principle of the strategy is that the product of a phase-leg-switching function and its load current in the time domain, which defines the switched current flowing through the phase leg, can be evaluated in the frequency domain by convolving the spectra of these two time-varying functions. Since PWM has a discrete line-frequency spectrum, this convolution evaluates as an infinite summation in the frequency domain, which reduces to a simple frequency shift of the PWM spectrum when the load current is assumed to be a fundamental single-frequency sinusoid. Hence, the switched currents flowing through the phase legs of an inverter can be evaluated as a summation of harmonics for any PWM strategy or inverter topology and can then be readily combined using superposition to determine the DC-link and DC bus-capacitor currents. The analytical approach has been verified against experimental results for an extensive range of two-level and multilevel converter topologies and PWM strategies.

A General Analytical Method for Calculating Inverter DC-Link Current Harmonics

A thorough analysis of basic electrical-systems considerations is presented. Guidance is provided in design, construction, and continuity of an overall system to achieve safety of life and preservation of property; reliability; simplicity of operation; voltage regulation in the utilization of equipment within the tolerance limits under all load conditions; care and maintenance; and flexibility to permit development and expansion. Recommendations are made regarding system planning; voltage considerations; surge voltage protection; system protective devices; fault calculations; grounding; power switching, transformation, and motor-control apparatus; instruments and meters; cable systems; busways; electrical energy conservation; and cost estimation.

IEEE Recommended Practice for Electric Power Distribution for Industrial Plants

This work analyzes the effects of the input voltage unbalance and sags on the DC bus electrolytic capacitors in adjustable-speed drives (ASDs) in order to predict their impact on expected capacitor lifetime. The key phenomenon that causes these problems is the transition of the rectifier stage from three-phase to single-phase operation. Since the ESR (equivalent series resistance) increases at low frequencies, the low-order harmonic current components (120 Hz, 240 Hz, etc.) contribute disproportionately to the capacitor power losses and temperature rise, resulting in reduced lifetime. Closed-form expressions are developed for predicting these effects including the impact of finite line impedance, finite bus capacitance, and varying load. The impact of inverter SVPWM (space vector pulse width modulation) switching on the capacitor loss is also included. Simulations and experimental tests are used to verify the accuracy and effectiveness of the closed-form analysis using a 5 hp ASD system.

DC bus electrolytic capacitor stress in adjustable- speed drives under input voltage unbalance and sag conditions

Voltage unbalance or sag conditions generated by the line excitation can cause the input rectifier stage of an adjustable-speed drive (ASD) to enter single-phase rectifier operation. This degradation of the input power quality can have a significant negative impact on the induction-machine performance characteristics. This paper provides an approximate closed-form analysis of the impact of line-voltage sags and unbalance on the induction-machine phase voltages, currents, and torque pulsations for a general-purpose ASD consisting of a three-phase diode bridge rectifier, a dc link, and a pulsewidth modulation (PWM) inverter delivering constant volts-per-hertz excitation. Attention is focused on the impact of the dominant second harmonic of the line frequency, which appears in the dc link voltage during the sag/unbalance conditions, neglecting the impact of the other higher order harmonics. In addition to the closed-form analytical results that assume constant rotor speed, both simulation and experimental results are presented, which confirm the key analytical results, including the dominance of the second harmonic in the resulting torque pulsations. The analytical results can be used as a valuable design tool to rapidly evaluate the approximate impact of unbalance/sag conditions on ASD machine performance.

Closed-form analysis of adjustable-speed drive performance under input-voltage unbalance and sag conditions

This paper investigates the impact of input voltage unbalance and sags on stresses in the dc-bus choke inductor and dc-bus electrolytic capacitors of adjustable-speed drives (ASDs). These stresses are primarily attributable to the rectifier's transition into single-phase operation, giving rise to low-order harmonic voltages (120 Hz, 240 Hz, etc.) that are applied to the dc-link filter components. These harmonics elevate the ac-flux densities in the dc choke core material significantly above values experienced during normal balanced-excitation conditions, causing additional core losses and potential magnetic saturation of the core. It is shown that the effects of voltage unbalances and sags on the dc-link capacitor lifetime will be the same when either line inductors or a dc-link choke inductor are used if the dc choke-inductance value is twice the value of the line inductance. Simulations and experimental tests are used to verify the accuracy of predictions provided by closed-form analysis and simulation for a 5-hp or 3730-W ASD system.

Impact of input voltage sag and unbalance on dc link inductor and capacitor stress in adjustable speed drives

Voltage unbalance or sag conditions generated by the line excitation can cause the input rectifier stage of an adjustable-speed drive (ASD) to enter single-phase rectifier operation. This degradation of the input power quality can have a significant negative impact on the induction machine performance characteristics. This paper provides an approximate closed-form analysis of the impact of line voltage sags and unbalance on the induction machine phase voltages, currents, and torque pulsations for a general-purpose ASD consisting of a three-phase diode bridge rectifier, dc link, and PWM inverter delivering constant volts-per-Hertz excitation. Attention is focused on the impact of the dominant 2nd harmonic of the line frequency that appears in the DC link voltage during the sag/unbalance conditions, neglecting the impact of the other higher-order harmonics. In addition to the closed-form analytical results that assume constant rotor speed, both simulation and experimental results are presented that confirm the key analytical results, including the dominance of the 2nd harmonic in the resulting torque pulsations. The analytical results can be used as a valuable design tool to rapidly evaluate the approximate impact of unbalance/sag conditions on ASD machine performance.

Closed-form analysis of adjustable speed drive performance under input voltage unbalance and sag conditions

Voltage unbalance or sag conditions generated by the line excitation can cause the input rectifier stage of an adjustable-speed drive (ASD) to enter a single-phase rectifier operation. This degradation of the input power quality can have a significant negative impact on the induction machine performance characteristics, but the presence of an LC filter in the drive's input rectifier stage can be used to attenuate these undesired effects. The purpose of this paper is to investigate the impact of the inductor placement in the ASD topology on the drive's performance under voltage unbalance or sag conditions. More specifically, the relative advantages of choosing either a dc-link choke inductor or three ac line inductors are discussed using a combination of closed-form analysis and simulations. The results of first-order sizing calculations show that a dc-link choke inductor may offer some volume and mass advantages over three separate ac line inductors for the same ASD performance under unbalanced voltage conditions. Experimental results using a 5-hp ASD confirm the key analytical performance predictions

W.E. Berkopec

Papers

DC bus electrolytic capacitor stress in adjustable- speed drives under input voltage unbalance and sag conditions

Closed-form analysis of adjustable-speed drive performance under input-voltage unbalance and sag conditions

Impact of input voltage sag and unbalance on dc link inductor and capacitor stress in adjustable speed drives

Closed-form analysis of adjustable speed drive performance under input voltage unbalance and sag conditions

Impact of Inductor Placement on the Performance of Adjustable-Speed Drives Under Input Voltage Unbalance and Sag Conditions