Circuit design techniques are described for switched-capacitor filters, modulators, rectifiers, detectors, and oscillators. The applications of these circuits in telecommunications, speech processing, and other signal-processing systems are also briefly discussed.

Switched-capacitor circuit design

A description is given of a high-performance fifth-order low-pass switched-capacitor filter operating form a single 5-V supply. The filter uses a fully differential topology combined with input-to-output class AB amplifier design, dynamic biasing, and switched-capacitor common-mode feedback. An experimental prototype fabricated in a 5-/spl mu/m CMOS technology requires only 350 /spl mu/W of power to meet the PCM channel filter requirements. Typical measured results are: a dynamic range of 92 dB; a supply rejection (PSRR) of 40 dB over the entire Nyquist range; and a total harmonic distortion of -73 dB for a 2-V r.m.s. differential output signal. The chip active area is about 3900 mil/SUP 2/.

A high-performance micropower switched-capacitor filter

Bandpass filters for communications applications are realized using an 80 MHz differential single-stage CMOS operational amplifier and a fully differential identical-resonator elliptic bandpass ladder filter configuration. Experimental results are given for a CMOS sixth-order 260 kHz elliptic bandpass filter with a Q-factor of 40, a clock frequency of 4 MHz, and a power dissipation of 70 mW.

High-frequency CMOS switched-capacitor filters for communications application

In this paper, various technological and topological considerations for the design of monolithic MOS switched-capacitor (SC) filtering systems are described. The properties of the passive and active devices typically available in depletion-load NMOS and CMOS technologies are presented as they relate to various SC peformance parameters. Layout techniques for improving specific performance parameters are also given. An overview of MOS operational-amplifier design emphasizes technological considerations in the design of high-performance SC systems. Finally, several important techniques are reviewed for maximizing dynamic range in SC circuits.

Technological design considerations for monolithic MOS switched-capacitor filtering systems

This paper introduces a CMOS operational amplifier with rail-to-rail input and output voltage ranges, suitable for operation in extremely low-voltage environments. The approach is based on a bulk-driven input stage with extended input common-mode voltage range, in which the effective input transconductance is enhanced by means of a partial positive feedback loop. As a result, a gain and gain-bandwidth product performance similar to that of an amplifier using a gate-driven approach is obtained. Output rail-to-rail operation is achieved by means of a push-pull stage, which is biased in class-AB by using a static feedback loop, thus avoiding frequency limitations inherent in dynamic-feedback tuning schemes. The proposed two-stage operational amplifier was designed to operate with a 1-V supply, and a test chip prototype was fabricated in 0.35-mum standard CMOS technology. The experimental performance features an open-loop DC gain higher than 76 dB and a closed-loop unity-gain bandwidth above 8 MHz when a 1-MOmegapar17-pF load is connected to the amplifier output.

1-V Rail-to-Rail CMOS OpAmp With Improved Bulk-Driven Input Stage

Three switched-capacitor circuits are described which perform all filtering functions in a PCM voice CODEC. They use novel integrators and/or state-variable sections, which desensitize the overall response against stray-capacitance effects. All filters are fully integrated on a CMOS test chip. The basic design considerations and the measured performance are discussed.

W.E. Nicholson

Papers

CMOS switched-capacitor filters for a PCM voice CODEC