Magneto-optical Kerr effect microscopy is used to show that monolayer chromium triiodide is an Ising ferromagnet with out-of-plane spin orientation. The question of what happens to the properties of a material when it is thinned down to atomic-scale thickness has for a long time been a largely hypothetical one. In the past decade, new experimental methods have made it possible to isolate and measure a range of two-dimensional structures, enabling many theoretical predictions to be tested. But it has been a particular challenge to observe intrinsic magnetic effects, which could shed light on the longstanding fundamental question of whether intrinsic long-range magnetic order can robustly exist in two dimensions. In this issue of Nature, two groups address this challenge and report ferromagnetism in atomically thin crystals. Xiang Zhang and colleagues measured atomic layers of Cr2Ge2Te6 and observed ferromagnetic ordering with a transition temperature that, unusually, can be controlled using small magnetic fields. Xiaodong Xu and colleagues measured atomic layers of CrI3 and observed ferromagnetic ordering that, remarkably, was suppressed in double layers of CrI3, but restored in triple layers. The two studies demonstrate a platform with which to test fundamental properties of purely two-dimensional magnets. Since the discovery of graphene1, the family of two-dimensional materials has grown, displaying a broad range of electronic properties. Recent additions include semiconductors with spin–valley coupling2, Ising superconductors3,4,5 that can be tuned into a quantum metal6, possible Mott insulators with tunable charge-density waves7, and topological semimetals with edge transport8,9. However, no two-dimensional crystal with intrinsic magnetism has yet been discovered10,11,12,13,14; such a crystal would be useful in many technologies from sensing to data storage15. Theoretically, magnetic order is prohibited in the two-dimensional isotropic Heisenberg model at finite temperatures by the Mermin–Wagner theorem16. Magnetic anisotropy removes this restriction, however, and enables, for instance, the occurrence of two-dimensional Ising ferromagnetism. Here we use magneto-optical Kerr effect microscopy to demonstrate that monolayer chromium triiodide (CrI3) is an Ising ferromagnet with out-of-plane spin orientation. Its Curie temperature of 45 kelvin is only slightly lower than that of the bulk crystal, 61 kelvin, which is consistent with a weak interlayer coupling. Moreover, our studies suggest a layer-dependent magnetic phase, highlighting thickness-dependent physical properties typical of van der Waals crystals17,18,19. Remarkably, bilayer CrI3 displays suppressed magnetization with a metamagnetic effect20, whereas in trilayer CrI3 the interlayer ferromagnetism observed in the bulk crystal is restored. This work creates opportunities for studying magnetism by harnessing the unusual features of atomically thin materials, such as electrical control for realizing magnetoelectronics12, and van der Waals engineering to produce interface phenomena15.

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Layer-dependent ferromagnetism in a van der Waals crystal down to the monolayer limit

The detection of photons underpins imaging, spectroscopy, fibre-optic communications and time-gated distance measurements. Nanostructured materials are attractive for detection applications because they can be integrated with conventional silicon electronics and flexible, large-area substrates, and can be processed from the solution phase using established techniques such as spin casting, spray coating and layer-by-layer deposition. In addition, their performance has improved rapidly in recent years. Here we review progress in light sensing using nanostructured materials, focusing on solution-processed materials such as colloidal quantum dots and metal nanoparticles. These devices exhibit phenomena such as absorption of ultraviolet light, plasmonic enhancement of absorption, size-based spectral tuning, multiexciton generation, and charge carrier storage in surface and interface traps.

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Nanostructured materials for photon detection

This paper presents a novel flash memory cell based on localized charge trapping in a dielectric layer and on a new read operation. It is based on the storage of a nominal /spl sim/400 electrons above a n/sup +//p junction. Programming is performed by channel hot electron injection and erase by tunneling enhanced hot hole injection. The new read methodology is very sensitive to the location of trapped charge above the source. This single device cell has a two physical bit storage capability. The cell shows improved erase performances, no over erase and erratic bit issues, very good retention at 250/spl deg/C, and endurance up to 1M cycles. Only four masks are added to a standard CMOS process to implement a virtual ground array. In a typical 0.35 /spl mu/m process, the area of a bit is 0.315 /spl mu/m/sup 2/ and 0.188 /spl mu/m/sup 2/ in 0.25 /spl mu/m technology. All these features and the small cell size compared to any other flash cell make this device a very attractive solution for all NVM applications.

NROM: A novel localized trapping, 2-bit nonvolatile memory cell

Self-consistent optical parameters of intrinsic silicon at 300 K including temperature coefficients

A dry etching method for etching an aluminum (Al) based layer for effectively combatting the after-corrosion in accordance with three aspects. In the first aspect, while a resist mask and chlorine based gas as known per se are used, S 2 F 2 is used during etching of the barrier metal layer. In this manner, residual chlorine in a carbonaceous polymer as a sidewall protection material or a resist mask is replaced by fluorine, whilst sulfur yielded from S 2 F 2 under conditions of discharge dissociation is deposited to provide for sidewall protection effects. In the second aspect, a SiO 2 mask and an S 2 Cl 2 etching gas are used. Since the sidewall protection material is solely sulfur yielded from S 2 Cl 2 , it becomes possible to avoid the effects of the residual chlorine. In the third aspect, an neutral Ar beam is irradiated at a suitable stage in the etching process for increasing the resistance of the SiO 2 mask against reducing compounds contained in an etching gas for the layer of the aluminum-based material. By irradiation of the neutral beam, a reduction-resistant layer is produced on the surface of the SiO 2 mask to render it possible to reduce the mask thickness without producing problems such as increased step differences on the wafer surface.

Dry etching method

Optical constant spectra for silicon and thermally grown silicon dioxide have been simultaneously determined using variable angle of incidence spectroscopic ellipsometry from 0.75 to 6.5 eV. Spectroscopic ellipsometric data sets acquired at multiple angles of incidence from seven samples with oxide thicknesses from 2 to 350 nm were analyzed using a self-contained multi-sample technique to obtain Kramers–Kronig consistent optical constant spectra. The investigation used a systematic approach utilizing optical models of increasing complexity in order to investigate the need for fitting the thermal SiO2 optical constants and including an interface layer between the silicon and SiO2 in modeling the data. A detailed study was made of parameter correlation effects involving the optical constants used for the interface layer. The resulting thermal silicon dioxide optical constants were shown to be independent of the precise substrate model used, and were found to be approximately 0.4% higher in index than publis...

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Ellipsometric determination of optical constants for silicon and thermally grown silicon dioxide via a multi-sample, multi-wavelength, multi-angle investigation

We reported a new polysilicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile memory using channel hot electron injection for high-speed programming. For the first time, we demonstrated that source-side injection technique, which is commonly used in floating gate nonvolatile memories for its high programming efficiency, can also be used in a SONOS device for achieving high-speed programming. Erase of the device is achieved by tunneling of electrons through the thin top oxide of the ONO charge storage stack. Since the thin top oxide is grown from the nitride layer, the self-saturated nature of the oxidation allows better thickness control. Endurance characteristics indicates that quality of the thin top grown from nitride is as good as the tunnel oxide grown from the silicon substrate. By increasing the top oxide thickness, it is possible to achieve ten years of retention requirement. The self-aligned sidewall gate structure allows small cell size for high density applications.

A new SONOS memory using source-side injection for programming

Application of IR variable angle spectroscopic ellipsometry to the determination of free carrier concentration depth profiles

A method for form an integrated circuit device begins by growing a tunnel oxide (22). The tunnel oxide is exposed to a nitrogen containing ambient whereby nitrogen is incorporated at atomic locations at the interface between the tunnel oxide (22) and a substrate (11). This tunnel oxide and nitrogen exposure is performed for all of a floating gate active area (12), a high voltage active area (14) and a logic gate active area (16). A floating gate electrode (24) and interpoly dielectric regions (26 through 30) are then formed in the floating gate region (12). The tunnel oxide (22) is etched from the active areas (14 and 16) whereby nitrogen contamination (32) may remain. An optional sacrificial oxidation and a low temperature 830° C. wet oxidation process utilizing HCL, H2 and O2 is then used to grow a high voltage gate dielectric (34) which has been shown to improve charge to breakdown characteristics by a factor of 1,000. After the formation of the high voltage gate oxide (34), a lower voltage logic gate oxide (36) is then formed.

Method for forming a high voltage gate dielectric for use in integrated circuit

A self-aligned contact is formed in a multi-layer semiconductor device. In one form, conductive members are formed overlying a substrate material and a first insulating layer is deposited overlying the substrate material and the conductive members. A film of material is deposited on the first insulating layer and the film of material is patterned to form a sacrificial plug in an area where a contact is to be made. A second insulating layer is deposited on the device, and the device is made substantially planar. The second insulating layer is etched back to expose the sacrificial plug. The sacrificial plug is removed by selectively etching the device such that the first and second insulating layers are left substantially unaltered. An anisotropic etch of the device is performed to expose an area of the substrate material on which a contact is to be made, and to simultaneously form sidewall spacers along edges of the conductive members. A conductive layer is deposited onto the device and patterned, thereby forming a self-aligned contact.

Wayne M. Paulson

Papers

Ellipsometric determination of optical constants for silicon and thermally grown silicon dioxide via a multi-sample, multi-wavelength, multi-angle investigation

A new SONOS memory using source-side injection for programming

Application of IR variable angle spectroscopic ellipsometry to the determination of free carrier concentration depth profiles

Method for forming a high voltage gate dielectric for use in integrated circuit

Process for forming a self-aligned contact structure