Weng-Fai Wong

TL;DR: Aspects of ClearView that make it particularly appropriate for this context include its ability to generate patches without human intervention, apply and remove patchesto and from running applications without requiring restarts or otherwise perturbing the execution, and identify and discard ineffective or damaging patches by evaluating the continued behavior of patched applications.

TL;DR: The experiments show that on the average, the proposed multi retention level STT-RAM cache reduces 30 ∼ 70% of the total energy compared to previous works, while improving IPC performance for both 2-level and 3-level cache hierarchy.

TL;DR: A sensor grid architecture, called the scalable proxy-based architecture for sensor grid (SPRING), is proposed to address design issues and develop a sensor grid testbed to study the design issues of sensor grids and to improve the design architecture design.

TL;DR: These algorithms exploit microscopic parallelism using specialized hardware with heavy use of truncation based on detailed accuracy analysis for the computation of the common elementary functions, namely division, logarithm, reciprocal square root, arc tangent, sine and cosine.

TL;DR: A novel approach is presented that efficiently analyzes interactions between threads to determine thread correlation and detect true and false sharing, and is able to improve the performance of some applications up to a factor of 12x and shed light on the obstacles that prevent their performance from scaling to many cores.