Thisarticle presents an efficient analogue sorting algorithm for balancing the submodule (SM) capacitor voltages of modular multilevel converter (MMC). The proposed analogue sorting algorithm offers the advantage of fast convergence rate without any need of recursive loops for the implementation on embedded devices. It can be easily implemented with combinational logic operations on field programmable gate array (FPGA) and provides less hardware and computational overhead. The functionality and performance of the proposed analogue sorting algorithm is evaluated with the simulation model of three phase five-level MMC in MATLAB/Simulink environment. The real time implementation of the proposed sorting algorithm with the SM capacitor voltage balancing strategy is implemented on Altera/Cylone - I (EP1C12Q240C8N) FPGA. A five-level continuous space vector pulsewidth modulation (CSVPWM) is realized on a PIC microcontroller (PIC18F452). A down-scaled model of single-phase five-level MMC is designed and constructed to investigate the reliable and stable operation of MMC with the proposed analogue sorting algorithm and SVPWM method. Simulation and experimental results are presented for validation.

An Efficient Sorting Algorithm for Capacitor Voltage Balance of Modular Multilevel Converter With Space Vector Pulsewidth Modulation

Thisarticle presents an efficient analogue sorting algorithm for balancing the submodule (SM) capacitor voltages of modular multilevel converter (MMC). The proposed analogue sorting algorithm offers the advantage of fast convergence rate without any need of recursive loops for the implementation on embedded devices. It can be easily implemented with combinational logic operations on field programmable gate array (FPGA) and provides less hardware and computational overhead. The functionality and performance of the proposed analogue sorting algorithm is evaluated with the simulation model of three phase five-level MMC in MATLAB/Simulink environment. The real time implementation of the proposed sorting algorithm with the SM capacitor voltage balancing strategy is implemented on Altera/Cylone - I (EP1C12Q240C8N) FPGA. A five-level continuous space vector pulsewidth modulation (CSVPWM) is realized on a PIC microcontroller (PIC18F452). A down-scaled model of single-phase five-level MMC is designed and constructed to investigate the reliable and stable operation of MMC with the proposed analogue sorting algorithm and SVPWM method. Simulation and experimental results are presented for validation. 

The frequency-aliasing phenomenon, which can distort high-frequency harmonics in the analog input signal into low-frequency harmonics in the output digital signal, is widespread in the process of analog to digital conversions. The sorting-algorithm-based voltage-balance strategy is also such a conversion process. This strategy converts the analog-continuous-sinusoidal fundamental wave into the digital-discrete inserted-submodule number, deciding how many submodules are required to operate in modular multilevel converters (MMC). Thus, the frequency-aliasing phenomenon can occur in this strategy and deteriorate the performance of MMC as well. This article first proposes the mechanism of the frequency-aliasing phenomenon in the sorting-algorithm-based voltage-balance strategy. A quantitative analysis is then presented to indicate the root cause of the frequency-aliasing phenomenon in the voltage-balance strategy. This analysis also intuitively describes the frequency-aliasing phenomenon's effect, such as harmonic redistributions in the large-signal model, the phase delay in the small-signal model, and the associated deteriorations including the system stability's decrease and the power quality's reduction. Based on the above analysis, an optimal value design method is proposed to suppress the frequency-aliasing phenomenon by determining an appropriate voltage-balance frequency. A code restructuration method is further implemented to adapt the voltage-balance strategy to the optimal frequency and to avoid extra switching actions at the same time. The deteriorations caused by the frequency-aliasing phenomenon and the effectiveness of proposed methods are finally demonstrated via simulations experiments.

Wenjun Xie

Papers

Analysis and Suppression of the Frequency-Aliasing Phenomenon Related to the Sorting-Algorithm-Based Voltage-Balance Strategy in an MMC System