Ultra Wideband Signals and Systems in Communication Engineering

High-performance parallel computer architecture and systems have been improved at a phenomenal rate. In the meantime, VLSI computer-aided design (CAD) software for multibillion-transistor IC design has become increasingly complex and requires prohibitively high computational resources. Recent studies have shown that, numerous CAD problems, with their high computational complexity, can greatly benefit from the fast-increasing parallel computation capabilities. However, parallel programming imposes big challenges for CAD applications. Fully exploiting the computational power of emerging general-purpose and domain-specific multicore/many-core processor systems, calls for fundamental research and engineering practice across every stage of parallel CAD design, from algorithm exploration, programming models, design-time and run-time environment, to CAD applications, such as verification, optimization, and simulation. This journal special section will cover recent progress on parallel CAD research, including algorithm foundations, programming models, parallel architectural-specific optimization, and verification. More specifically, papers with in-depth and extensive coverage of the following topics will be considered, as well as other topics relevant to the design of parallel CAD algorithms and software tools. 1. Parallel algorithm design and specification for CAD applications 2. Parallel programming models and languages of particular use in CAD 3. Runtime support and performance optimization for CAD applications 4. Parallel architecture-specific design and optimization for CAD applications 5. Parallel program debugging and verification techniques particularly relevant for CAD The papers should be submitted via the Manuscript Central website and should adhere to standard ACM TODAES formatting requirements (http://todaes.acm.org/). The page count limit is 25.

Parallel CAD: Algorithm Design and Programming Special Section Call for Papers TODAES: ACM Transactions on Design Automation of Electronic Systems

Millimeter wave (mmWave) communication has raised increasing attentions from both academia and industry due to its exceptional advantages. Compared with existing wireless communication techniques, such as WiFi and 4G, mmWave communications adopt much higher carrier frequencies and thus come with advantages including huge bandwidth, narrow beam, high transmission quality, and strong detection ability. These advantages can well address difficult situations caused by recent popular applications using wireless technologies. For example, mmWave communications can significantly alleviate the skyrocketing traffic demand of wireless communication from video streaming. Meanwhile, mmWave communications have several natural disadvantages, e.g., severe signal attenuation, easily blocked by obstacles, and small coverage, due to its short wavelengths. Hence, the major challenge is how to overcome its shortcomings while fully utilizing its advantages. In this paper, we present a taxonomy based on the layered model and give an extensive review on mmWave communications. Specially, we divide existing efforts into four categories that investigate: physical layer, medium access control (MAC) layer, network layer, and cross layer optimization, respectively. First, we present an overview of some technical details in physical layer. Second, we summarize available literature in MAC layer that pertains to protocols and scheduling schemes. Third, we make an in-depth survey of related research work in network layer, providing brain storming and methodology for enhancing the capacity and coverage of mmWave networks. Fourth, we analyze available research work related to cross layer allocation/optimization for mmWave communications. Fifth, we make a review of mmWave applications to illustrate how mmWave technology can be employed to satisfy other services. At the end of each section described above, we point out the inadequacy of existing work and identify the future work. Sixth, we present some available resources for mmWave communications, including related books about mmWave, commonly used mmWave frequencies, existing protocols based on mmWave, and experimental platforms. Finally, we have a simple summary and point out several promising future research directions.

Millimeter Wave Communication: A Comprehensive Survey

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Design Of Integrated Circuits For Optical Communications

Capacitive power transfer (CPT) technology is an effective and important alternative to the conventional inductive power transfer (IPT). It utilizes high-frequency electric fields to transfer electric power, which has three distinguishing advantages: negligible eddy-current loss, relatively low cost and weight, and excellent misalignment performance. In recent years, the power level and efficiency of CPT systems has been significantly improved and has reached the power level suitable for electric vehicle charging applications. This paper reviews the latest developments in CPT technology, focusing on two key technologies: the compensation circuit topology and the capacitive coupler structure. The comparison with the IPT system and some critical issues in practical applications are also discussed. Based on these analyses, the future research direction can be developed and the applications of the CPT technology can be promoted.

https://www.mdpi.com/1996-1073/10/11/1752/pdf

A Review on the Recent Development of Capacitive Wireless Power Transfer Technology

Due to limits on the availability of the energy source in many mobile user platforms (ranging from handheld devices to portable electronics to deeply embedded devices) and concerns about how much heat can effectively be removed from chips, minimizing the power consumption has become a primary driver for system-on-chip designers. Because of their superb characteristics, FinFETs have emerged as a promising replacement for planar CMOS devices in sub-20nm CMOS technology nodes. However, based on extensive simulations, we have observed that the delay vs. temperature characteristics of FinFET-based circuits are fundamentally different from that of the conventional bulk CMOS circuits, i.e., the delay of a FinFET circuit decreases with increasing temperature even in the super-threshold supply voltage regime. Unfortunately, the leakage power dissipation of the FinFET-based circuits increases exponentially with the temperature. These two trends give rise to a tradeoff between delay and leakage power as a function of the chip temperature, and hence, lead to the definition of an optimum chip temperature operating point (i.e., one that balances concerns about the circuit speed and power efficiency.) This paper presents the results of our investigations into the aforesaid temperature effect inversion (TEI) and proposes a novel dynamic thermal management (DTM) algorithm, which exploits this phenomenon to minimize the energy consumption of FinFET-based circuits without any appreciable performance penalty. Experimental results demonstrate 40% energy saving (with no performance penalty) can be achieved by the proposed TEI-aware DTM approach compared to the best-in-class DTMs that are unaware of this phenomenon.

/pdf/dynamic-thermal-management-for-finfet-based-circuits-3r0ksh6qvz.pdf

Dynamic thermal management for FinFET-based circuits exploiting the temperature effect inversion phenomenon

Dual-mode power regulator for photovoltaic module emulation

Photovoltaic (PV) cells are promising endurable renewable power sources that do not include mechanical components, which are subject to wear and tear. However, actual development of a solar-powered system requires elaborated design processes to find the best setup including location determination and development of a maximum power point tracking method, which requires numerous on-site experiments. This paper introduces a versatile PV module emulation system, which can cover a range of different PV modules and environmental conditions. We provide an accurate parameter characterization methodology with nonlinear curve fitting to minimize the model discrepancy over the entire operating range. The proposed PV module emulation system includes a pilot PV cell, temperature sensors, an accelerometer, and a magnetic sensor, and provides features for the PV module characterization and emulation modes. Experimental results show significant improvement in the emulation accuracy, which comes from the advanced PV module characterization method as well as high-precision hardware and control.

Versatile high-fidelity photovoltaic module emulation system

In this paper we measure and verify the performance improvements in deep learning computation under the support of GPU-enabled multi-core parallel computing platforms. To measure the performance practically, we built our own computing platforms using a GPU hardware (1152 cores) and the TensorFlow software library. In order to evaluate the performance with GPU, we conducted the deep learning computation with various numbers of hidden layers in multilayer perceptron. As presented in the comparative performance results, utilizing GPU hardware improved the performance in terms of computation time (about 3 times or even more).

Performance of deep learning computation with TensorFlow software library in GPU-capable multi-core computing platforms

Modern smartphones consume significant power and can hardly provide a full day's use between charging operations even with a 2000 mAh battery. This is in spite of many power management techniques being employed in the smartphones. This paper starts from the observation that modern smartphones waste a significant amount of the battery's stored energy during power conversion from the 3.7V output of a Li-Ion battery cell to different voltage levels needed to power various modules in a smartphone (processors, memory, display, GPS, etc.) Indeed the power conversion efficiency from the battery source to point of use in the smart phone has on average of only 60-75% efficiency. The approach taken to reduce this energy waste in smartphones is to (i) profile the power consumption of each module under different operating scenarios, (ii) build an equivalent DC-DC converter model for each smartphone module and estimate its power conversion efficiency, and (iii) change the parameters of the actual converters in the smartphone to improve the equivalent power conversion efficiencies for all modules. Experimental results demonstrate that we can achieve 6% to 15% power conversion efficiency enhancement, which translates to up to 30% reduction in the power losses incurred during power conversion in smartphones.

/pdf/power-conversion-efficiency-characterization-and-4biwm3q5pk.pdf

Woojoo Lee

Papers

Dynamic thermal management for FinFET-based circuits exploiting the temperature effect inversion phenomenon

Dual-mode power regulator for photovoltaic module emulation

Versatile high-fidelity photovoltaic module emulation system

Performance of deep learning computation with TensorFlow software library in GPU-capable multi-core computing platforms

Power conversion efficiency characterization and optimization for smartphones