http://repository.ias.ac.in/30700/1/399.pdf

BEEM imaging and spectroscopy of buried structures in semiconductors

An integrated circuit that includes a power stage and a driver stage, all stages using III-nitride power devices

Integrated iii-nitride power converter circuit

The experimental and theoretical progress in understanding the electronic structure and the related parameters of Schottky interfaces and heterojunctions is reviewed. Particular emphasis is devoted to the solution of several historical controversial points, to the impact of novel ab initio theoretical approaches, to new experimental techniques based on synchrotron light and free electron lasers, to the efforts towards controlled modifications of interface parameters and to the foreseeable future developments of this vigorously progressing and technologically crucial field.

http://iopscience.iop.org/article/10.1088/0034-4885/62/5/203/pdf

Interface states at semiconductor junctions

A step down type DC-DC power-supply device implements both the stabilization of the control loop and the responsibility at the same time. In the power-supply device, an output power signal is fed back to an error amplifier after having passed through a CR smoothing filter provided independently of a power LC smoothing filter. Also, independently of the duty controls over Power MOSFETs, i.e., upper-side/lower-side semiconductor switching components in the steady state, an output from the power LC smoothing filter is added to an upper and lower limit-mode-equipped control circuit, thereby, at the transient state, forcefully setting the duty α at either 0% or 100%.

Power supply device

The invention provides a switching audio power amplifier with de-noise function, including a first comparator, a second comparator, a logic control unit, a de-noise circuit, and a bridge circuit. The first comparator and the second comparator respectively generate the first PWM signal and the second PWM signal, and then the logic control unit performs logic operation to generate a third PWM signal and a fourth PWM signal. If the pulse width of the third PWM signal (or the fourth PWM signal) is lower than a threshold, the de-noise circuit increases the pulse width of the third PWM signal or the fourth PWM signal and outputs the fifth PWM signal and the sixth PWM signal to drive the bridge circuit. Next, the bridge circuit conducts a driving current alternately flowing to and from a load according to the firth PWM signal and the sixth PWM signal.

Switching audio power amplifier with de-noise function

A circuit for providing over-current protection, the circuit including a gate driver circuit for controlling a bridge circuit including a half bridge stage having high and low switches. The circuit includes a feedback loop circuit for counting over-current indicators sensed during one or more consecutive PWM cycles; wherein when an over-current indicator is sensed, the low switch is turned OFF for duration of a first time period after which the low switch is turned back ON, to enable determination of an over-current condition where false noise signals are rejected thereby preventing circuit shutdowns due to false over-current condition.

Noise immune over current protection with inherent current limiting for switching power converter

A control terminal driver circuit for a switching amplifier including a driver (66, 69) for each of a pair of output power transistors (56, 58) responsive to a PWM information signal. The circuit operates in response to an operating state signal (91) indicating a start up condition of the amplifier to vary the amplitude of the drive pulses for the output transistors (56, 58) between a zero value and a maximum value for normal operation of the amplifier over a start up interval, and to reverse the process during a shut down interval. A DC offset detector (74) is provided to detect a DC offset at amplifier output, and an error circuit (86) responsive to an output of the DC offset detector (74) controls the relative amplitude of the driver outputs during at least a portion of the start up interval to substantially eliminate the DC offset. Also disclosed is a switching amplifier including a control terminal driver circuit as described above.

Gate control circuit with soft start/stop function

A control terminal driver IC for a switching circuit having series connected high and low side output transistors, an associated split power supply and a floating input, the gate drive IC, an exemplary, but non-limiting, example of which is a Class D audio amplifier. The IC includes an input circuit, a voltage to current converter connected to the input circuit, a level shifter formed in a mid well of the IC, which is operative to transfer the input signal to the low side without the need for a power supply input to the mid well, a current to voltage converter on the low side coupled to the level shifter; and an output circuit which is operative to generate control terminal drive signals for the high and low side transistors.

Gate driver with level shift between static wells with no power supply

A circuit for minimizing voltage inrush upon startup in a switching power converter having a switching stage including high and low switches connected at a common node, a feedback loop for maintaining a target output voltage, an output capacitor connected between an output node and the ground, an inductor connected between the common node and the output node, and a control circuit having a first error amplifier for providing a first signal based on a comparison of a reference voltage and voltage provided by the feedback loop, the control circuit including a level switch connected between the ground and the common node, the level switch being controlled in accordance with the first signal, wherein a large inrush current flowing into the output capacitor when the circuit is starting up is minimized

Method to reduce inrush voltage and current in a switching power converter

A dead-time generator for incorporation in an integrated circuit wherein the integrated circuit includes a high side and low side gate driver and wherein the high side and low side gate driver drive output switches such that a dead-time is provided between on times of the output switches, the dead-time generator comprising a circuit internal to the integrated circuit having an external terminal at which a dead-time setting component is connected, and wherein the dead-time generator comprises a circuit for providing a discrete dead-time for a range of dead-time setting values at the dead-time setting terminal and wherein, for a plurality of ranges of dead-time setting values at the dead-time setting terminal, the dead-time generator generates an associated plurality of discrete dead-times.

Xiao-chang Cheng

Papers

Noise immune over current protection with inherent current limiting for switching power converter

Gate control circuit with soft start/stop function

Gate driver with level shift between static wells with no power supply

Method to reduce inrush voltage and current in a switching power converter

Gate driver with programmable dead-time insertion