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Xin Yang

Publications -  16
Citations -  14

Xin Yang is an academic researcher. The author has contributed to research in topics: Computer science & Engineering. The author has an hindex of 2, co-authored 16 publications receiving 14 citations.

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Modeling of High-Power Tonpilz Terfenol-D Transducer Using Complex Material Parameters

TL;DR: In this article , three losses in Terfenol-D are considered by introducing complex quantities, representing the elastic loss, piezomagnetic loss, and magnetic loss, for high-power lowfrequency transducers requiring more smart materials, losses become even more appreciable.
Journal ArticleDOI

A Temperature-Dependent Physical Thermal Network Model Including Thermal Boundary Conditions for SiC MOSFET Module

TL;DR: In this paper , a temperature-dependent physical resistor-capacitor (RC) network model is proposed, which can accurately characterize the thermal behavior of SiC MOSFETs particularly under high-temperature conditions.
Journal ArticleDOI

Loss Characterization of Giant Magnetostrictive Material Under Compressive Stress

TL;DR: In this paper , a longitudinal transducer was designed for complex parameters characterization of giant magnetostrictive material (GMM) under compressive stress, and the key three losses in GMM were successfully characterized using a multi-degree-of-freedom (MDOF) lumped parameter equivalent circuit model (LECM), meticulously incorporating the surface contact damping, stiffness and structural losses.

A Reliable Device Parameter Extraction Scheme for Physics-Based IGBT Models

TL;DR: In this article , a novel parameter extraction scheme based on the particle swarm optimization (PSO) algorithm is proposed to extract precise and robust device parameters, which is used to ensure the accuracy of the parameter extraction.

A 3-D Thermal Network Model for Monitoring of IGBT Modules

TL;DR: In this article , a 3D physical RC network model is proposed for insulated-gate bipolar transistor (IGBT) modules, which considers the temperature effects and uneven power loss distribution on the chip.