An RF-DC power conversion system is designed to efficiently convert far-field RF energy to DC voltages at very low received power and voltages. Passive rectifier circuits are designed in a 0.25 mum CMOS technology using floating gate transistors as rectifying diodes. The 36-stage rectifier can rectify input voltages as low as 50 mV with a voltage gain of 6.4 and operates with received power as low as 5.5 muW(22.6 dBm). Optimized for far field, the circuit operates at a distance of 44 m from a 4 W EIRP source. The high voltage range achieved at low load current make it ideal for use in passively powered sensor networks.

Efficient Far-Field Radio Frequency Energy Harvesting for Passively Powered Sensor Networks

The idea of wireless power transfer (WPT) has been around since the inception of electricity. In the late 19th century, Nikola Tesla described the freedom to transfer energy between two points without the need for a physical connection to a power source as an ?all-surpassing importance to man? [1]. A truly wireless device, capable of being remotely powered, not only allows the obvious freedom of movement but also enables devices to be more compact by removing the necessity of a large battery. Applications could leverage this reduction in size and weight to increase the feasibility of concepts such as paper-thin, flexible displays [2], contact-lens-based augmented reality [3], and smart dust [4], among traditional point-to-point power transfer applications. While several methods of wireless power have been introduced since Tesla?s work, including near-field magnetic resonance and inductive coupling, laser-based optical power transmission, and far-field RF/microwave energy transmission, only RF/microwave and laser-based systems are truly long-range methods. While optical power transmission certainly has merit, its mechanisms are outside of the scope of this article and will not be discussed.

Harvesting Wireless Power: Survey of Energy-Harvester Conversion Efficiency in Far-Field, Wireless Power Transfer Systems

More than a decade of research in the field of thermal, motion, vibration and electromagnetic radiation energy harvesting has yielded increasing power output and smaller embodiments. Power management circuits for rectification and DC–DC conversion are becoming able to efficiently convert the power from these energy harvesters. This paper summarizes recent energy harvesting results and their power management circuits.

/pdf/micropower-energy-harvesting-1l9ase94z1.pdf

Micropower energy harvesting

More than a decade of research in the field of thermal, motion, vibration and electromagnetic radiation energy harvesting has yielded increasing power output and smaller embodiments. Power management circuits for rectification and DC-DC conversion are becoming able to efficiently convert the power from these energy harvesters. This paper summarizes recent energy harvesting results and their power management circuits.

Neuromorphic computing has come to refer to a variety of brain-inspired computers, devices, and models that contrast the pervasive von Neumann computer architecture This biologically inspired approach has created highly connected synthetic neurons and synapses that can be used to model neuroscience theories as well as solve challenging machine learning problems The promise of the technology is to create a brain-like ability to learn and adapt, but the technical challenges are significant, starting with an accurate neuroscience model of how the brain works, to finding materials and engineering breakthroughs to build devices to support these models, to creating a programming framework so the systems can learn, to creating applications with brain-like capabilities In this work, we provide a comprehensive survey of the research and motivations for neuromorphic computing over its history We begin with a 35-year review of the motivations and drivers of neuromorphic computing, then look at the major research areas of the field, which we define as neuro-inspired models, algorithms and learning approaches, hardware and devices, supporting systems, and finally applications We conclude with a broad discussion on the major research topics that need to be addressed in the coming years to see the promise of neuromorphic computing fulfilled The goals of this work are to provide an exhaustive review of the research conducted in neuromorphic computing since the inception of the term, and to motivate further work by illuminating gaps in the field where new research is needed

A Survey of Neuromorphic Computing and Neural Networks in Hardware.

This paper presents a 950-MHz wireless power transmission system and a high-sensitivity rectifier circuit for ubiquitous sensor network tags. The wireless power transmission offers a battery-life-free sensor tag by recharging the output power of a base station into a secondary battery implemented with the tag. For realizing the system, a high-sensitivity rectifier with dynamic gate-drain biasing has been developed in a 0.3-/spl mu/m CMOS process. The measurement results show that the proposed rectifier can recharge a 1.2-V secondary battery over -14-dBm input RF power at a power conversion efficiency of 1.2%. In the proposed wireless system, this sensitivity corresponds to 10-m distance communication at 4-W output power from a base station.

A 950-MHz rectifier circuit for sensor network tags with 10-m distance

A layered neural net realized with two chips is described. One chip implements 24*24 synapses, a local weight control mechanism, and quantized +or-1 LSB, both momentum and weight update schemes. The other contains 24 neurons, implementing not only backward propagation (BP) but Hebbian learning, with 200-pF drive capability. Some experimental chip characteristics verifying the implemented techniques are given. >

Neuro chips with on-chip back-propagation and/or Hebbian learning

In a neural network, neurons and synapses are two unit functions. If the learning procedures are assigned appropriately, they can be placed in tiling form. This arrangement is potentially expandable if constructed of two separate LSI chips, a synapse chip and a neuron chip. The authors describe such an implementation. A single synapse configuration is shown along with a synapse group with 64 synapses and a learning control circuit. A single neuron functional block diagram is presented, and synapse characteristics are shown. >

Neuro chips with on-chip backprop and/or Hebbian learning

A 3.5μm bulk CMOS Si-gate process applied to the design of a 20MS/s flash A/D converter powered by a single 5V supply, will be reported. By employing non-sampling amplifiers in a comparator array, 7b accuracy has been achieved with a power dissipation of 150mW.

http://ieeexplore.ieee.org/iel6/8299/25931/01156643.pdf

Y. Fujita

Papers

A 950-MHz rectifier circuit for sensor network tags with 10-m distance

Neuro chips with on-chip back-propagation and/or Hebbian learning

Neuro chips with on-chip backprop and/or Hebbian learning

A bulk CMOS 20MS/s 7b flash ADC