Showing papers by "Yasuhiro Sugimoto published in 1997"

The design of a 1 V, 1 GHz CMOS VCO circuit with in-phase and quadrature-phase outputs

Abstract: A CMOS ring-oscillator type VCO circuit with inphase (I) and quadrature-phase (Q) outputs has been designed by using 0.6 /spl mu/m MOS devices. This VCO has demonstrated 1 V and 1 GHz operational capabilities. Two differential delay cells has been used as one delay section and the transitions of the delay cell outputs have been combined, and thus the 1 GHz 1/Q output generation has been realized. The current-mode approach throughout the design has resulted in the extremely low voltage operation. The simulation results show more than 1.4 GHz oscillation frequency from a 1 V power supply, and less than /spl plusmn/1 phase error for I/Q outputs when Vth variation is 10 mV.

A low-voltage, high-speed and low-power full current-mode video-rate CMOS A/D converter

Abstract: This paper examines the feasibility of developing a full current-mode video-rate CMOS A/D converter (ADC), with 1V operation in mind in the future. The initial specification in the design stage was resolution greater than 8-bits, 20MHz clock frequency and 40mW of power dissipation from a 3V power supply. A fully current-mode pipeline ADC was created by using 0.6 µm CMOS process, resulting in 7-bit equivalent S/N, 20MHz clock speed, 3V operation and 100mW of power dissipation. It indicates the possibility of realizing a low-voltage video-rate ADC by using the full current-mode circuit approach.

A current-mode, 3 V, 20 MHz, 9-bit equivalent CMOS sample-and-hold circuit

Abstract: A new current-mode, low-power, low-voltage and high-speed CMOS sample-and-hold circuit has been designed and fabricated. A new current-mode differential switching scheme has been adopted to eliminate errors caused by feedthrough injection from the sample switches. The experimental result yields 9-bit resolution in 9 mW power dissipation, in a 20 MHz clock frequency from a 3 V power supply.