Recent advances in flexible and stretchable electronics (FSE), a technology diverging from the conventional rigid silicon technology, have stimulated fundamental scientific and technological research efforts. FSE aims at enabling disruptive applications such as flexible displays, wearable sensors, printed RFID tags on packaging, electronics on skin/organs, and Internet-of-things as well as possibly reducing the cost of electronic device fabrication. Thus, the key materials components of electronics, the semiconductor, the dielectric, and the conductor as well as the passive (substrate, planarization, passivation, and encapsulation layers) must exhibit electrical performance and mechanical properties compatible with FSE components and products. In this review, we summarize and analyze recent advances in materials concepts as well as in thin-film fabrication techniques for high-k (or high-capacitance) gate dielectrics when integrated with FSE-compatible semiconductors such as organics, metal oxides, quantum...

High- k Gate Dielectrics for Emerging Flexible and Stretchable Electronics

Sm2O3 gate dielectric on Si substrate

The authors report on the direct integration of high-dielectric constant (high-k) Ta2O5 films on p-type single crystal diamond for high-power electronic devices. Crystallized hexagonal phase δ-Ta2O5 film is achieved on diamond by annealing the amorphous Ta2O5 film deposited by a sputter-deposition technique. The electrical properties of the Ta2O5 thin films are investigated by fabricating metal-insulator-semiconductor (MIS) diodes. The leakage current of the MIS diode is as low as 10−8 A/cm2 for the as-deposited amorphous Ta2O5 film and 10−2 A/cm2 for the crystallized film, which is 108 and 102 times lower than that of the Schottky diode at a forward bias of −3 V, respectively. The dielectric constant of the amorphous Ta2O5 films is measured to be 16 and increases to 29 after annealing at 800  °C. Different current leakage mechanisms and charge trapping behaviors are proposed for the amorphous and crystallized Ta2O5 thin films.

Integration of high-dielectric constant Ta2O5 oxides on diamond for power devices

The effects of Ta incorporation in Y2O3 gate dielectric on the electrical characteristics of InGaZnO thin-film transistor are investigated. With an appropriate Ta content in the Y2O3 gate dielectric, the saturation mobility of the thin-film transistor can be significantly increased, about three times that of the control sample with Y2O3 gate dielectric. Accordingly, the sample with a Ta/Ta+Y ratio of 68.6% presents a high saturation mobility of 33.5 cm2 V−1 s−1, low threshold voltage of 2.0 V, large on/off current ratio of 2.8 × 107, and suppressed hysteresis. This can be attributed to the fact that the Ta incorporation can suppress the hygroscopicity of Y2O3 and thus reduces the Y2O3/InGaZnO interface roughness and also the traps at/near the interface, as supported by atomic force microscopy and low-frequency noise measurement, respectively. However, excessive Ta incorporation in the Y2O3 gate dielectric leads to degradation in device performance because Ta-related defects are generated.

/pdf/effects-of-ta-incorporation-in-y2o3-gate-dielectric-of-1bq8x7un98.pdf

Effects of Ta incorporation in Y2O3 gate dielectric of InGaZnO thin-film transistor

Recent Progress of Rare Earth Oxides for Sensor, Detector, and Electronic Device Applications: A Review

https://ir.nctu.edu.tw:443/bitstream/11536/15827/1/000301400000016.pdf

The characteristics of the high-K Er2O3 (erbium oxide) dielectrics deposited on polycrystalline silicon

The high-k Ta2O5 films deposited on the polycrystalline silicon treated with different postrapid thermal annealing temperatures were formed as high-k interdielectrics. Physical and electrical characteristics of the Ta2O5 dielectrics were investigated with x-ray diffraction, x-ray photoelectron spectroscopy, atomic force microscopy, and electrical analysis. The annealing at 800 °C was found to be the optimal condition to reduce the defects and interface traps existed in the interface between the Ta2O5 dielectric and polysilicon to fabricate a well-crystallized film with higher breakdown field, lower leakage current and smaller charge trapping rate. This Ta2O5 dielectric shows promise for future generation of nonvolatile memory.

Physical and electrical characteristics of the high-k Ta2O5 "tantalum pentoxide… dielectric deposited on the polycrystalline silicon

The high-k Gd 2 O 3 films deposited on polycrystalline silicon treated with different post rapid thermal annealing (RTA) temperatures were formed as high-k interdielectrics. A combinational electrical and material analysis on the samples was performed to obtain a thorough understanding of annealing effect on the high-k Gd 2 O 3 interdielectrics. The annealing temperature at 900°C was the optimal condition to reduce the defects and interface traps and hence improve material quality to fabricate a well-crystallized film. This high-k Gd 2 O 3 interdielectric shows promise for future generation of nonvolatile memory applications.

http://jes.ecsdl.org/content/157/10/H915.full.pdf

Yu Tsung Pan

Papers

The characteristics of the high-K Er2O3 (erbium oxide) dielectrics deposited on polycrystalline silicon

Physical and electrical characteristics of the high-k Ta2O5 "tantalum pentoxide… dielectric deposited on the polycrystalline silicon

The Investigation of the High-k Gd2O3 (Gadolinium Oxide) Interdielectrics Deposited on the Polycrystalline Silicon