Y
Yunjian Jiang
Researcher at University of California, Berkeley
Publications - 10
Citations - 276
Yunjian Jiang is an academic researcher from University of California, Berkeley. The author has contributed to research in topics: Finite-state machine & Logic gate. The author has an hindex of 7, co-authored 10 publications receiving 275 citations.
Papers
More filters
Proceedings ArticleDOI
HW/SW partitioning and code generation of embedded control applications on a reconfigurable architecture platform
Massimo Baleani,Frank E. Gennari,Yunjian Jiang,Yatish Patel,Robert K. Brayton,Alberto Sangiovanni-Vincentelli +5 more
TL;DR: This paper studies the use of a reconfigurable architecture platform for embedded control applications aimed at improving real time performance and proposes a new mapping flow and algorithms to partition hardware and software that best utilize this architecture.
Proceedings ArticleDOI
State-based power analysis for systems-on-chip
TL;DR: Given the power state machines for individual cores, this work defines the product power state machine for the whole SoC and uses formal symbolic simulation algorithms for traversing and computing the minimum and maximum power dissipated by sets of power states in the SoC.
Proceedings ArticleDOI
Optimization of multi-valued multi-level networks
M. Gao,J.-H. Jiang,Yunjian Jiang,Y. Li,Alan Mishchenko,Subarna Sinha,Tiziano Villa,Robert K. Brayton +7 more
TL;DR: A program called MVSIS (Multi-Valued Sequential Interactive Synthesis) has been developed which optimizes multi-level multi-valued (MV) networks, and it is described what such a network is and the capabilities contained in MVSis.
Proceedings ArticleDOI
Don't cares and multi-valued logic network minimization
Yunjian Jiang,Robert K. Brayton +1 more
TL;DR: This work addresses optimizing multi-valued (MV) logic functions in a multi-level combinational logic network and gives a recursive image computation to transform the don't cares into the space of local inputs of the node to be minimized.
Proceedings ArticleDOI
Software synthesis from synchronous specifications using logic simulation techniques
Yunjian Jiang,Robert K. Brayton +1 more
TL;DR: A framework for software synthesis from multi-valued logic, including fast evaluation of logic functions, and scheduling techniques for node execution is proposed, which is generic enough to allow hardware/software partition for a given architecture platform.