An ESD simulation flow that has been demonstrated on 14 nm products is described. Due to Moore's Law, ESD protection devices are having an increasingly large impact on silicon area, power, and capacitance. A number of real-world examples demonstrating how the simulation flow improved these areas are provided.

A full-chip ESD simulation flow

6. Analog-to-Digital ESD Design Synthesis

Analog ESD and Latchup Design Rule Checking and Verification

We present a successfully implemented dynamic ESD simulation, verification and analysis tool, DynEsdChecker, that can simulate the ESD event on the layout containing RC extractions, can generate full chip ESD verification results, can provide user with guidelines on how to revise the design to meet the ESD design target.

https://ieeexplore.ieee.org/iel5/6034620/6045562/06045602.pdf

A predictive full chip dynamic ESD simulation and analysis tool for analog and mixed-signal ICs

Herein, we propose a novel entity extraction neural network (EXNN) with a newly designed sampling convolution kernel approach and a deep learning-based structure to differentiate noise in visible light communication (VLC) systems. In particular, EXNN is used to extract linear and nonlinear distortion in a received signal as an entity and compensate for the signal by removing it. First, we designed a deep learning structure tailored for VLC systems, used experimentation to validate our algorithm's usability, and determined an appropriate range for the hyper-parameters that govern the PAM-8 system. Second, we compared our approach with existing finite impulse response (FIR) linear and Volterra nonlinear compensation algorithms via experiments. Below the hard-decision forward error correction (HD-FEC) threshold limit of 3.8×10-3, experimental results show that the use of the EXNN increased the operating range of the direct current (DC) bias and the voltage by ∼33.3% and by ∼50% under optimal conditions, respectively. Furthermore, under corresponding optimal power conditions, the proposed approach improved the Q factor of the VLC system by 0.36 and 1.57 dB compared with the aforementioned linear and nonlinear equalizers, respectively. To the best of our knowledge, this is the first time that a deep learning operator has been custom-designed for the VLC system and we have named the completely redesigned network with this sampling convolution kernel operator as EXNN.

Utilizing deep neural networks to extract non-linearity as entities in PAM visible light communication with noise.

This paper describes a holistic design and simulation tool deployed for virtual prototyping of SiC power modules. The power module designer proceeds from concept to virtual prototype in a logical and comprehensive flow. Starting with a simple 2D DXF of the Direct Bond Copper (DBC), the module is designed through die selection and placement, layer and material property declaration, electrical connectivity, and external port definition. Automated 3D model generation is carried out through advanced Ansys scripting techniques. Multiple levels of simulation and model generation are executed through Ansys Icepak, Ansys Q3D, and SPICE. The tool has been validated on multiple onsemi SiC industrial and automotive traction power modules.

Yunpeng Xiao

Papers

A predictive full chip dynamic ESD simulation and analysis tool for analog and mixed-signal ICs

Utilizing deep neural networks to extract non-linearity as entities in PAM visible light communication with noise.

A Virtual Prototyping System for Silicon-Carbide Power Modules