The invention provides a lateral power device with a mixed conduction mode and a preparation method thereof. The lateral power device comprises a P type substrate, a buried oxide layer, an N type drift region, a P type base region, an N type buffer region, an N type source region, and a P type contact region, a P type collector region, an emitter, a collector, a gate dielectric layer, and a gate electrode. An N type bar and a P type bar are formed on the surface of the N type drift region and are arranged on the surface of the device drift region at an interval in a direction perpendicular tothe channel length direction; and a P type RESURF layer is formed in the drift region below the N type bar and a P type bar. A dielectric trench structure is formed between the N type bar, the P typebar, and the P type RESURF layer and the N type buffer region. The concentrations of the N type bar and a P type bar are larger than that of the N type drift region; and the depth of the dielectric trench structure is not less than depths of the N type bar, the P type bar, and the P type collector region. According to the invention, mixed conduction of the surface SJ-LDMOS and LIGBT is realized; the low condition drop is obtained; the voltage-withstanding performance is improved; the switching speed is increased; the turn-off losses are reduced; the snapback effect is eliminated; and the device performance is improved.

Lateral power device with mixed conduction mode and preparation method thereof

The invention provides an SOI-RC-LIGBT device and a preparation method thereof The SOI-RC-LIGBT device comprises an N-type substrate, a buried oxide layer, an N-type drift region, a trench gate structure, a P-type base region, an N+ source region, a P+ contact region, an emitting electrode, an oxide layer, an N-type buffer region and a P-type collector region; an N-type strip is arranged on the surface of the portion, between the P-type base region and the N-type buffer region, of the N-type drift region, and a P-type buried layer is arranged in the portion, below the N-type strip, of the drift region; a medium trench structure is arranged between the right sides of the N-type strip and the P-type buried layer and the left sides of the N-type buffer region and the P-type collector region;an N+ collector region is arranged between the N-type strip and the medium trench structure According to the SOI-RC-LIGBT device, while the IGBT conduction characteristic snapback phenomena are eliminated, the breakdown voltage of the device is improved, the forward conduction voltage drop of the device is reduced, the shutoff speed is increased, the shutoff loss is reduced, and meanwhile, the reverse recovery characteristics of an integrated free-wheeling diode are improved

SOI-RC-LIGBT device and preparation method thereof

Provided is a semiconductor testing circuit for an RC-IGBT chip, wherein a plurality of tests are performed successively with minimum probe contacts. A relay (RL1) is disposed between a power source (1) and a switching element (3). A relay (RL2) is disposed between a junction between the switching element (3) and an RC-IGBT chip (8) and a snubber circuit (4). A relay (RL3) is disposed between the junction between the switching element (3) and the RC-IGBT chip (8) and a coil (L2). A relay (RL4) is disposed between a diode (D1) and the switching element (3). A turn-ON/turn-OFF test for an IGBT unit (8a) involves turning the relays (RL2, RL4) ON. An avalanche test for the IGBT unit (8a) involves turning the relay (RL2) ON. A short-circuit test for the IGBT unit (8a) involves turning the relay (RL1) ON. A recovery test for an FWD unit (8b) involves turning the relays (RL1, RL3) ON. Here, the number of instances of probe contact is one.

Semiconductor testing circuit, semiconductor testing device, and semiconductor testing method

The invention provides a groove insulated gate bipolar transistor. The transistor comprises an N-type voltage barrier layer, a P-type channel region, a P+ ohmic contact area, an N+ emission area, a P- collector region, a P+ collector region, an N+ substrate layer, a groove gate and a gate oxide dielectric layer. One N-type current enhancement layer is arranged between the N-type voltage barrier layer and the P-type channel region. An N-type buffer layer is arranged between the N-type voltage barrier layer and a P-type collector region. A back portion of a new structure possesses one NPN transistor formed by the N-type voltage barrier layer, the P- collector region and the N+ substrate layer. The NPN transistor provides a rapid extraction channel for excessive electrons stored in the N-type voltage barrier layer during a device turn-off process and turn-off time of a device is shortened so that turn-off losses of the device are reduced and a trade-off relation between an on-state voltage drop and the turn-off losses of the device is further improved.

Groove insulated gate bipolar transistor

The invention provides an RC-IGBT device and a preparation method thereof. The RC-IGBT device includes a first collector region with a first conductivity type and a second collector region with a second conductivity type; the first collector region has a first end portion extending through the field cut-off region for isolating a field cut-off region into a first cut-off region and a second cut-off region; the portion of the first collector region, other than the first end portion, is disposed in contact with the first cut-off region; and the second collector region is disposed in contact withthe second cut-off region. Due to the isolation of the first end portion of the first collector region to the field cut-off region, electrons or holes need to climb over the first end portion, whichincreases carrier motion path, thereby increasing the potential difference of the RC-IGBT device, above the first collector region, in the initial period of conduction, making the PN junction easier to turn on, the device easier to switch from unipolar conduction to bipolar conduction, further suppressing the Snapback effect of the RC-IGBT device in the initial conduction period.

RC-IGBT device and preparation method thereof

The invention belongs to the power semiconductor device technology field and especially provides an inverse-conduction-type insulated-gate bipolar transistor(RC-IGBT) and a manufacturing method thereof. The invention aims at acquiring a good device characteristic and increasing RC-IGBT reliability. By using the RC-IGBT device, under a forward direction IGBT work mode, a snapback phenomenon is completely eliminated; and because two kinds of P-type collecting zones with different concentrations and thicknesses are used, a lower IGBT forward direction conduction voltage drop and a good compromise of the forward direction conduction voltage drop and closing short losses can be acquired. Under a reverse direction diode follow current work mode, a small conduction voltage drop is possessed. Simultaneously, a back portion P+ collecting zone width does not need to be increased under the condition that a plurality of MOS cells are connected in parallel on a front side and a small back side cell width can be used. A problem of current and temperature uniformity of a traditional RC-IGBT device is solved; reliability is greatly increased; and a manufacturing technology is compatible with a traditional RC-IGBT device technology.

RC-IGBT device and manufacturing method thereof

A binary channel RC-LIGBT device and a manufacturing method therefor are disclosed. The invention belongs to the field of power semiconductor integrated circuits and specifically relates to a reverse conducting-LIGBT/RC-LIGBT and a manufacturing method therefor that are used for suppressing snapback phenomena of a conventional RC-LIGBT device, improving characteristics of backward diodes and improving device stability and reliability. The RC-LIGBT device disclosed in the invention has a unilateral electric conduction path having binary channels, the unilateral electric conduction path is formed by introducing a composite structure at a collector electrode end of the device, impact exerted on conduction characteristics by an N type collecting zone can be completely shielded in a forward direction LIGBT work mode, the snapback phenomena can be completely eliminated, the RC-LIGBT device disclosed in the invention has the same low conduction voltage drop as the conventional LIGBT, device stability and reliability can be improved, two freewheel channels are provided at the collector electrode end in a backward diode freewheel work mode, freewheeling capacity of the RC-LIGBT device is optimized, and the RC-LIGBT device is enabled to have a small conduction voltage drop.

Binary channel RC-LIGBT device and manufacturing method therefor

The invention discloses a dual-channel reverse conducting insulated gate bipolar transistor (RC-IGBT) device and a preparation method thereof, belongs to the technical field of a power semiconductor device, and specifically provides a dual-channel RC-IGBT and a preparation method thereof, for the purpose of optimizing a reverse diode feature and improving the device reliability. A unidirectional conductive path is formed at the back surface of the device, a snapback phenomenon is completely eliminated under a forward IGBT work mode, and the device has the same conducting voltage drop as a conventional IGBT; the device has a small conducting voltage drop under a reverse diode freewheeling work mode; and at the same time, since the width of a back P+ collecting zone does not have to be increased, a small back surface cellular width can be employed, the problem of current and temperature uniformity of a conventional RC-IGBT device is overcome, the reliability is greatly improved, and the preparation technology is compatible with that of the conventional RC-IGBT device.

Zhang Jinping

Papers

RC-IGBT device and manufacturing method thereof

Binary channel RC-LIGBT device and manufacturing method therefor

Dual-channel reverse conducting insulated gate bipolar transistor (RC-IGBT) device and preparation method thereof