Due to decelerating gains in single-core CPU performance, computationally expensive simulations are increasingly executed on highly parallel hardware platforms. Agent-based simulations, where simulated entities act with a certain degree of autonomy, frequently provide ample opportunities for parallelisation. Thus, a vast variety of approaches proposed in the literature demonstrated considerable performance gains using hardware platforms such as many-core CPUs and GPUs, merged CPU-GPU chips as well as Field Programmable Gate Arrays. Typically, a combination of techniques is required to achieve high performance for a given simulation model, putting substantial burden on modellers. To the best of our knowledge, no systematic overview of techniques for agent-based simulations on hardware accelerators has been given in the literature. To close this gap, we provide an overview and categorisation of the literature according to the applied techniques. Since, at the current state of research, challenges such as the partitioning of a model for execution on heterogeneous hardware are still addressed in a largely manual process, we sketch directions for future research towards automating the hardware mapping and execution. This survey targets modellers seeking an overview of suitable hardware platforms and execution techniques for a specific simulation model, as well as methodology researchers interested in potential research gaps requiring further exploration.

A Survey on Agent-based Simulation Using Hardware Accelerators

In hardware/software (HW/SW) co-design, hardware/software partitioning is an essential step in that it determines which components to be implemented in hardware and which ones in software. Most of HW/SW partitioning problems are NP hard. For large-size problems, heuristic methods have to be utilized. This paper presents a parallel genetic algorithm with dispersion correction for HW/SW partitioning on CPU-GPU. First, an enhanced genetic algorithm with dispersion correction is presented. The under-constraint individuals are marched to feasible region step by step. In this way, the intensification can be enhanced as well as the constraint problem can be handled. Second, the individuals performing costs computation and dispersion correction are run in parallel. For a given problem size, the overall run-time can be reduced while the diversity of genetic algorithm can be kept. Third, especially when a number of under-constraint individuals should be corrected in an irregular way, the computation process is complicated and the computation overhead is large. Therefore, we present a novel parallel strategy by leveraging the parallel power of a multi-core CPU and that of a many-core GPU. The proposed strategy computes the costs of each individual in parallel on GPU and corrects the under-constraint individuals in parallel on the multi-core CPU. In this way, a highly efficient parallel computing can be achieved in which dozens of irregular correction computing steps are mapped to the multi-core CPU and thousands of regular cost computing steps are mapped to the many-core GPU. Fourth, at each iteration of the hybrid parallel strategy, the solution vectors of individuals are transferred to the GPU and their costs are transferred back to the CPU. In order to further improve the efficiency of proposed algorithm, we propose an asynchronous transfer pattern (stream concurrency pattern) for CPU-GPU, in which the transfer process and computation process are overlapped and eventually the overall run-time can be reduced further. Finally, the experiments show that the solution quality obtained by our method is competitive with existing heuristic methods in reasonable time. Furthermore, by combining with the multi-core CPU and many-core GPU, the running time of the proposed method is efficiently reduced.

A Parallel Genetic Algorithm With Dispersion Correction for HW/SW Partitioning on Multi-Core CPU and Many-Core GPU

The local backlight dimming technology has recently been presented for liquid crystal displays in order to reduce the power consumption of backlight and improve the quality of the display. Therefore, exploiting the tradeoff between the image quality and power consumption has become the focus of local backlight dimming technology. This paper considers the local backlight dimming as an optimization problem, i.e., how to preserve the image quality perception with a certain low backlight power consumption. To achieve this goal, we use the swarm intelligence algorithm. Specifically, an improved shuffled frog leaping algorithm is proposed for local backlight dimming. Simulation results show that the proposed algorithm achieves the better tradeoff between power consumption and image quality when compared to other algorithms based on image parameters.

Optimal Local Dimming Based on an Improved Shuffled Frog Leaping Algorithm

In electronic design automation, hardware/software co-design significantly reduces the time-to-market and improves the performance of embedded systems. With the increasing scale of applications and complexity of hardware architecture of embedded systems, hardware/software co-design is still a research hotspot. As hardware/software co-design is a wide topic, this paper focuses on major developments of three important aspects related to hardware/software partitioning, which has great effects on the performance of embedded systems. Firstly, various partitioning models including hardware architectures and abstract models are surveyed. Secondly, classical and new algorithms for hardware/software partitioning are classified and analyzed. Thirdly, existing parallel algorithms for hardware/software co-design are discussed in details. Finally, possible research directions are pointed out in conclusion.

A survey on partitioning models, solution algorithms and algorithm parallelization for hardware/software co-design

Bi-functional thin film with both selected light extraction and reliable moisture vapor barrier was proposed for simultaneous light management and encapsulation in the fields of lighting and display. Atomic layer deposition (ALD) was employed to obtain TiO2 and Al2O3 films with high uniformity, forming distributed Bragg reflector (DBR) structure. The DBRs exhibited excellent and tunable optical properties, as well as reliable moisture barrier performance. With increasing the DBR layers, the transmittances decreased obviously. The transmittance in the blue light region was as low as 0.66% for DBR with 6.5 pairs and the water vapor transmission rates value was 3.06 × 10-5 g m-2 d-1 for DBR with 4.5 pairs. These DBRs were integrated in the red quantum dot (QD) based color converters excited by blue LED, enabling an obvious increase in red emission and a strong decrease in blue light transmittance. Furthermore, these DBRs can prolong the lifetime of QDs evidently by isolating the QDs from the moisture (oxygen) vapor. These results highlight the potentials for the exploitation of DBRs fabricated using ALD in the application of lighting and display devices based on QD photoluminescence and electroluminescence.

https://iopscience.iop.org/article/10.1088/1361-6528/aaf4e1/pdf

Design and fabrication of bi-functional TiO2/Al2O3 nanolaminates with selected light extraction and reliable moisture vapor barrier performance.

Hardware/software partitioning is playing an important role in designing complex embedded systems. In this paper, by considering the parallelism between hardware and software, we propose a more practical hardware/software partitioning method which can be combined with task scheduling. In one aspect, in order to select a more suitable partitioning algorithm, the concept of blind optimization algorithm for hardware/software partitioning is presented, and the advantages of this kind of algorithms are illustrated by diagrams. We combined the Shuffled Frog Leaping Algorithm (SFLA) with Earliest Time First (ETF), a scheduling algorithm, and proposed a new hardware/software partitioning algorithm named SFLA-ETF. The solution quality and algorithm execution time of SFLA-ETF is better than other blind algorithms and it can also obtain better solutions than non-blind optimization algorithm.

Using Blind Optimization Algorithm for Hardware/Software Partitioning

In order to enhance viewing experiences, a number of backlight local dimming (BLD) algorithms have been developed to improve the image contrast ratio and provide power efficiency for modern displays. In order to evaluate which BLD algorithm performs best for HDR images rendering on dual-panel displays, this paper presents a comprehensive subjective and objective evaluation conducted with five BLD algorithms across a number of scenes. The subjective evaluation (N = 24) required participants to rank each BLD generated image based on which they thought was the most natural looking. The objective evaluation was undertaken via the use of a novel methodology to generate the images per BLD for comparison against the ground truth High Dynamic Range (HDR) image. Resulting images were compared with the ground truth using qualitative methods namely: HDR-VDP, puPSNR, puSSIM and puVIFP. The power-saving rate of each method was also calculated. The results demonstrate a strong correlation between objective and subjective evaluation. Furthermore, results show that BLD algorithms that consider the luminance balance between backlight and LCD images perform better than straightforward BLD methods.

/pdf/subjective-and-objective-evaluation-of-local-dimming-2yt0mx77zu.pdf

Subjective and objective evaluation of local dimming algorithms for HDR images

This paper proposes a wide color gamut approach that uses white and emerald lighting units as the backlight of the liquid crystal display. The white and emerald backlights are controlled by the image to be displayed. The mixing ratio of the white and the emerald lighting is analyzed so that the maximal color gamut coverage ratio can be achieved. Experimental results prove the effectiveness of the wide color gamut approach using white and emerald backlights.

Wide color gamut display with white and emerald backlighting.

With a wide range of applications, single-image super-resolution (SISR) is a very important computer vision task. There are many SISR strategies which are based on the CNNs improvement, such as residual connections, deeper networks, and attention mechanisms. Although such kind of strategies often improve the SISR performance, they increase CNNs’ computational complexity and complex image texture areas still remain hard to be reconstructed. In particular, all the existing loss functions are minimized in the whole dynamic range, e.g. 0-255 in case of 8 bit image, which causes difficulty of CNNs’ learning in texture image regions above all. Developing new loss function provides a promising SISR solution, i.e. one should be beyond the existing regression loss functions, which encounter problem in reconstructing the image texture details. For such goal, this paper proposes a dynamic fine-grained loss function. It consists of both an existing regression loss function and a new pixel classification loss together with a dynamic regression range loss. Extensive experiments conducted on the benchmark SISR show that the proposed method can achieve better results and without extra computational cost.

Zhichun Lei

Papers

Optimal Local Dimming Based on an Improved Shuffled Frog Leaping Algorithm

Using Blind Optimization Algorithm for Hardware/Software Partitioning

Subjective and objective evaluation of local dimming algorithms for HDR images

Wide color gamut display with white and emerald backlighting.

Fine-Grained Dynamic Loss for Accurate Single-Image Super-Resolution