Journal ArticleDOI
An approach to fault-tolerance in architectures for discrete Fourier transforms
TLDR
Primary goal of this work is application of self-reconfiguration Algorithms to Fourier Transform architectures, as required for installation of the processing system on satellites.About:
This article is published in Microprocessing and Microprogramming.The article was published on 1986-12-01. It has received 5 citations till now. The article focuses on the topics: Discrete Fourier transform & Discrete Hartley transform.read more
Citations
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Proceedings ArticleDOI
Policies for fault-tolerance through mixed space- and time-redundancy in semi-systolic FFT arrays
TL;DR: A mixed-mode solution is proposed, limiting the amount of structure redundancy, keeping intact nominal processing speed, but more complex fault distributions require use of time-redundancy, whereby nominal speed decreases but processing power is kept unchanged.
Proceedings ArticleDOI
Reconfiguration of FFT arrays: a flow-driven approach
A. Antola,N. Scarabottolo +1 more
TL;DR: A new reconfiguration algorithm for defect and fault tolerance in fast Fourier transform (FFT) two-dimensional arrays is presented and shows a significant increase in system robustness with respect to other, non-dedicated reconfigurations approaches.
Journal ArticleDOI
Systolic arrays for serial signal processing
TL;DR: In this paper, a serial systolic array for implementation of Convolution and Discrete Fourier Transform (DFT) is given.
Proceedings ArticleDOI
Fault-tolerance in a high-speed 2D convolver/correlator: Starloc
TL;DR: Starloc (Sandia target location computer), a special-purpose computer for locating 3D objects in a 2D image using a generalized correlation filter algorithm, is described and design and fabrication of a prototype have been completed.
Book ChapterDOI
Formal Models of Reconfiguration
TL;DR: This section reviews several of the fundamental results on the “reconfigurability” of linear or 2-dimensional arrays of N cells as N becomes large and provides a review of algorithms for WSI systolic array reconfiguration, emphasizing large N and the probabilistic bounds on “wire length.
References
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Journal ArticleDOI
VLSI Array processors
TL;DR: A general overview of VLSI array processors and a unified treatment from algorithm, architecture, and application perspectives is provided in this article, where a broad range of application domains including digital filtering, spectrum estimation, adaptive array processing, image/vision processing, and seismic and tomographic signal processing.
Journal ArticleDOI
Tutorial review of synthetic-aperture radar (SAR) with applications to imaging of the ocean surface
TL;DR: In this article, a synthetic aperture radar (SAR) is used to produce high-resolution two-dimensional images of mapped areas, where the amplitude and phase of received signals are collected for the duration of an integration time after which the signal is processed.
Related Papers (5)
A Class of Optimal VLSI Architectures for Computing Discrete Fourier Transform.
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VLSI Architectures for Multidimensional Fourier Transform Processing
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