Patent
Apparatus and methods for semiconductor wafer testing
TLDR
An automatic system for sheet resistivity testing on surface layers of semiconductor wafers, including a wafer handling stage having a platform for carrying a semiconductor Wafer, and an arrangement for mounting the platform for rotation about a central axis and for translation of the platform orthogonal to a major surface thereof, is presented in this paper.Abstract:
An automatic system for performing sheet resistivity testing on surface layers of semiconductor wafers, including a wafer handling stage having a platform for carrying a semiconductor wafer, and an arrangement for mounting the platform for rotation about a central axis and for translation of the platform orthogonal to a major surface thereof. A platform drive translates the platform between a wafer test position and a wafer load position, and a stage drive rotates the platform to accurately located angular test positions. A probe handling arrangement includes a carriage for carrying a test probe parallel to the major surface of a wafer on the platform and a carriage drive translates the carriage between a parked position in which a test prove thereon is positioned adjacent and clear of the platform and accurately located test positions along a radius of the platform. The carriage carries a resistivity test probe which includes test probe element for contacting the surface of a semiconductor wafer. A light tight housing surrounds the platform and includes an access door therein facing the platform and positioned intermediate the wafer load position and the wafer test position of the platform. The access door translates under controlled motor drive between a closed position and an open position which permits the platform to translate between the wafer load and wafer test positions. Sensor arrangements cooperate with a safety inhibit circuit to preclude destructive movement of components when position conflict is sensed. All movements and measurements are under microcomputer control.read more
Citations
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References
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Patent
Method and apparatus for targetless wafer alignment
TL;DR: In this article, a method and apparatus for targetless X, Y and θ alignment of a semiconductor wafer having thereon a large number of identical microcircuits or dies that are arranged in a pattern to form rows and columns separated by scribe lines or "streets".
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TL;DR: In this article, a method and apparatus to improve the capabilities of automatic and semi-automatic diode, integrated chip, and wafer probers is presented, which is accomplished through an electronic logic circuit triggered by electrical contact of the probe as opposed to a mechanical sensor.
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