Patent
Apparatus for multiple-divisor prescaler
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TLDR
In this paper, a clock toggle mechanism is used to vary the trigger edges of each divided-by-2 divider in the n-order divider, and associates the odd/even core divider to realize the multiple-divisor prescaler apparatus.Abstract:
Disclosed is an apparatus for multiple-divisor prescaler, which includes an odd/even core divider, a divisor control logic unit, an odd number inserted mechanism, and an n-order divided-by-2 divider with changeable trigger edges. This invention uses a clock toggle mechanism to vary the trigger edges of each divided-by-2 divider in the n-order divider, and associates the odd/even core divider to realize the multiple-divisor prescaler apparatus. Thereby, it achieves the purpose of being divided by 30/31. In addition, it increases the divisor range up to 2 n−1 +2 and 2 n +1 through the use of the clock toggle mechanism.read more
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References
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Fast programmable/resettable CMOS Johnson counters
TL;DR: An integrated circuit for frequency synthesis within a microprocessor as mentioned in this paper includes at least one of n-bit Johnson counter being clocked by a clock internal to the microprocessor, which generates "2n-1" outputs having "even" and "odd" divide values.
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