Patent
Bisitable digital circuitry
TLDR
In this paper, a cross-coupled gate with complementary inputs provided by CMOS threshold circuits coupled to a common digital signal input is presented. But the coupling between gates maintains the bistable digital circuits in a given stable state until the high and low threshold voltages are crossed over.Abstract:
Bistable digital circuits including cross coupled gates having complementary inputs provided by CMOS threshold circuits coupled to a common digital signal input. Complementary unbalanced transfer characteristics of the threshold circuits provide widely separated high and threshold voltages approaching respective high and low supply potentials. The coupling between gates maintains the bistable digital circuits in a given stable state until the high and low threshold voltages are crossed over in response to a change in logical level at the signal input.read more
Citations
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Patent
Animated dithered display systems
TL;DR: In this paper, a hysteresis band about the dither threshold value assigned to each display cell is established, delimited by upper and lower threshold values, which are used to determine whether the intensity of a given picture element of the image to be displayed is compared to the upper or lower threshold value of the corresponding display cell.
Patent
Self-biased trinary input circuit for MOSFET integrated circuit
TL;DR: In this paper, a trinary input circit for an MOSFET integrated circuit includes a biasing stage formed by using a standard inverter whose output is connected to its input so as to establish a particular bias voltage level when the input to the trinary inputs circuit is left floating.
Patent
Schmitt trigger circuit with selection circuit
Yoshihiro Iwamoto,Tetsuya Iida +1 more
TL;DR: In this article, a common input signal is supplied to first and second wave-shaping circuits, which have different threshold voltages and which provide different output wave-shaped signals, alternately selected by a selection circuit to provide the composite Schmitt trigger output signal.
Patent
Buffer circuit for driving a C-MOS inverter
TL;DR: In this paper, a buffer circuit for C-MOS inverters is proposed, where each of the inverters includes at least three transistors connected in series and at least one of the transistors in each inverter is driven by a delay circuit.
Patent
CMOS Schmitt trigger and oscillator
TL;DR: In this paper, a CMOS Schmitt trigger circuit displays a lower trigger point that is one N channel transistor threshold above the negative power supply potential and an upper trigger point, which is one P channel threshold below the positive power supply maximum potential.
References
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Patent
Low-power consumption complementary driver and complementary bipolar buffer circuits
TL;DR: In this paper, a low power complementary driver comprising a first complementary inverter is provided with a special circuit for turning the N-channel device off before the P-channel devices is turned on and vice versa to greatly reduce power consumption.
Patent
Pulse height analyzer
TL;DR: In this paper, an apparatus for selecting signals of a predetermined amplitude range from signals received from a nuclear energy detector is presented, where an input signal produces both lower and upper level signals when the input signal amplitude exceeds a predetermined upper level.