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Patent

Circuit arrangement for digitally processing a given number of channel signals

TLDR
In this article, a recursive digital filter and delay circuits are arranged in cascade there with a discrete Fourier transformer connected to the signal paths, such that the difference between such a phasefrequency characteristic and the phase-frequency characteristic of a reference digital filter has a sawtooth-shaped variation.
Abstract
An arrangement for digitally processing a given number of analog channel signals, more particularly a digital multiplexer and demultiplexer provided with a number of signal paths each comprising a recursive digital filter and delay circuits arranged in cascade therewith, said filter circuits having an amplitude-frequency characteristic of a lowpass filter having a cut-off frequency which is equal to half the bandwidth of a channel signal and a phase-frequency characteristic which is such that the difference between such a phase-frequency characteristic and the phase-frequency characteristic of a reference digital filter has a sawtooth-shaped variation, the slope of the sawtooth being opposite to the slope of the cooperating delay circuit. The arrangement furthermore comprises in cascade a discrete Fourier transformer connected to the signal paths.

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Citations
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Journal ArticleDOI

Design of a 24-channel transmultiplexer

TL;DR: The design of a transmultiplexer capable of performing the bilateral conversion between one 1544 kbit/s digital signal and two analog group signals and it is shown that an FIR filter bank required as part of such a trans multiplexer can be realized efficiently by cascading a discrete cosine transform processor and a weighting network.
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Digital filter bank

TL;DR: In this article, the authors proposed a digital filter for modulating and demodulating in frequency division multiplexing systems, where a weighting network weights the transformed samples with predetermined weighting coefficients to form a frequency-division multiplexed signal with proper passband characteristics.
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Digital SSB-FDM communication system derived from a complex band-pass digital filter bank and by a filter breakdown process

Maruta Rikio
TL;DR: In this paper, the phase offsets are provided in the modulator by a post-processor following a conventional DFT processor and in the demodulators by a pre-processor prior to conventional ODFT, which is called an offset discrete Fourier transform (ODFT) processor and supplied with real baseband sample sequences.
References
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Patent

Nonrecursive digital filter apparatus employing delayedadd configuration

TL;DR: In this paper, the delay introduced by each of the delay units of a non-recursive digital filter is selectively altered by employing an alternating series of two-input adders and partial sum delay units to perform the required addition of weight signal samples.
Patent

Universal digital filter for linear discrete systems

TL;DR: In this article, a second-order recursive digital filter is proposed for use as a universal building block in which a first summing means is provided for cyclically computing the function f(n) CX(n)+ 2( Alpha + 2)f(n-1)-f( n-2)+ Beta 1(( Alpha +2)f (n)-1)-F(n)-2)) where X n is a sampled input signal in digital form, f n-1 is the function that delayed one computational cycle by a first unit operator and f n −2 is
Patent

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TL;DR: In this article, a frequency division multiplex single-sideband modulation system using a multiplexed digital filter, the passband of which is sequentially shifted from one multiplex-ed channel to another in synchronization with an input time-division multiplex commutator and a frequency multiplexer modulator.
Patent

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TL;DR: In this article, the intersymbol interferences at the sampling points spaced by one and two time slots apart from the center sampling point of the single pulse response in the transmission line are detected and used to automatically control the optimum phases of the recovered clock signal and carrier.