scispace - formally typeset
Patent

Comparator and relaxation oscillator

TLDR
In this paper, a comparator consisting of a voltage generator, a buffer unit and a threshold control loop is used to regulate a transition threshold of the buffer unit to close to the second input signal.
Abstract
A comparator is provided. The comparator includes a voltage generator, a buffer unit and a threshold control loop. The voltage generator provides a reference voltage according to a constant current. The buffer unit provides an output signal according to a first input signal and a bias signal. The threshold control loop provides the bias signal to the buffer unit according to a second input signal, so as to regulate a transition threshold of the buffer unit to close to the second input signal. The output signal represents a compare result of the first and second input signals. The buffer unit and the threshold control loop are powered by the reference voltage.

read more

Citations
More filters
Patent

Relaxation oscillator and monolithic integrated chip

Fan Suyan
TL;DR: In this article, a relaxation oscillator and a monolithic integrated chip are provided to the relaxation oscillators, which can be used to generate a threshold voltage signal to an in-phase input end and an inverting input end of the comparator circuit.
Patent

Comparator and relaxation oscillator

Fan Suyan
TL;DR: In this paper, a comparator and a relaxation oscillator are presented, where the comparator is composed of two N-type MOS transistors and two P-type transistors.
Patent

Relaxation oscillator with average voltage feedback

TL;DR: In this paper, the authors proposed a relaxation oscillator with average voltage feedback for controlling the overturn of a comparator by introducing a circuit of the voltage feedback, where the average value of a sawtooth voltage on the charging and discharging capacitor is added too.
References
More filters
Patent

Latched comparator circuit

TL;DR: In this paper, a control unit is adapted to generate the reset signal based on the first and the second output voltage of the buffer unit and a clock signal and to generate an output signal of the latched comparator circuit based on a first and a second input voltage.
Patent

Comparator circuit and power supply circuit

TL;DR: In this article, a comparator circuit consisting of a current mirror circuit, a differential pair, and a first current source between first and second power supply lines is considered, where a gate electrode of the first MOS transistor is formed by polycrystalline silicon which contains an n-type impurity and is connected with the first power supply line.
Patent

Comparator circuit for reducing current consumption by suppressing glitches during a transitional period

TL;DR: In this article, a comparator circuit for reducing current consumption in a low consumption mode while suppressing the generation of glitches during a transitional period is proposed, which includes a comparison core circuit unit, a monitor circuit unit formed by a first transistor, and a nonlinear amplification circuit.
Patent

Comparator with multiple gain stages

TL;DR: In this article, a fast, accurate, low offset comparator may be configured with multiple gain stages, where a low gain, low input impedance, and fully differential common-gate amplifier is configured as a first stage in the multi-stage comparator, providing a wide bandwidth for small power consumption.