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Journal ArticleDOI

Databases and cell-selection algorithms for VLSI cell libraries

Simon Y. Foo, +1 more
- 01 Feb 1990 - 
- Vol. 23, Iss: 2, pp 18-30
TLDR
The issues that must be addressed before commercial database management systems can be used to manage VLSI CAD data are defined and a survey is presented of approaches addressing four of the defined issues: design hierarchies and multilevel representations, design alternatives and version control, common interface between cell libraries and efficient cell selection based on given design constraints.
Abstract
The issues that must be addressed before commercial database management systems can be used to manage VLSI CAD data are defined. A survey is presented of approaches addressing four of the defined issues: design hierarchies and multilevel representations, design alternatives and version control, common interface between cell libraries and efficient cell selection based on given design constraints. A frame-based model is considered as a case study of the special-purpose design database management system approach. This framework for capturing design data is based on semantic networks. It is well suited for application-specific ICs, yet general enough for other CAD/CAM environments. Benchmark results for the selection algorithms that run on top of the frame-based database system are presented. >

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Citations
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Proceedings ArticleDOI

Multi-level logic optimization by implication analysis

TL;DR: It is shown that Recursive Learning can derive “good” Boolean divisors justifying the effort to attempt a Boolean division, and for 9 out of 10 ISCAS-85 benchmark circuits, the tool HANNIBAL obtains smaller circuits than the well-known synthesis system SIS.
Patent

Circuit design methods and tools

TL;DR: In this paper, the structural and functional aspects of components are separated to specify the desired functional behavior of a component, leaving the actual gate-level design of the component to the design tool, translating a model of the desired logical behaviour of a circuit into a regularized set of functional components.
Patent

Method and apparatus for aiding system design

TL;DR: In this article, a method and apparatus for aiding system design with a computer is described, in which a system is decomposed into a plurality of objects, each of which has a parent-child hierarchical relationship where one or more of the child objects each defines a portion of a parent object.
Patent

Automated generation of megacells in an integrated circuit design system

TL;DR: In this paper, an automatic design generator has a user interface which receives design requirements for a megacell or other complex integrated circuit design, and retrieves relevant implementations from a library.
Patent

Computer tool for system level design

TL;DR: In this paper, a tool for system design is provided which allows a user to generate a first set of objects, each defining a portion of the system, and then a second set of implementable objects is generated, each of the second sets of objects is associated with the first set.
References
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Journal ArticleDOI

Modeling concepts for VLSI CAD objects

TL;DR: This paper identifies modeling concepts that are fundamental to capturing the semantics of VLSI CAD design objects and versions in terms of molecular objects and a provisional set of user operations on design objects, consistent with these modeling concepts, is defined.
Journal ArticleDOI

Design Version Management

TL;DR: A version server is developed that supports an object -oriented model for organizing design data and provides operational mechanisms for controlling the design's evolution, such as object check-in/checkout and a validation subsystem.
Journal ArticleDOI

An object-oriented VLSI CAD framework

TL;DR: It is shown, in the context of an actual prototype VLSI CAD framework called Cbase, how concepts such as data abstraction, property and operation inheritance, object specialization/generalization, code reusability, and polymorphism offered by object-oriented database management systems (OODBMSs) support rapid prototyping.