Patent
Digital phase-frequency detector
Helmut Herrmann,Stefan Herzinger +1 more
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TLDR
In this article, the authors proposed a phase-frequency detector with anti-backlash pulses, which prevent the mapping of very short correction pulses occurring on the basis of small phase differences by use of an AND logic circuit controlling the RESET of two flip flop circuits.Abstract:
In a digital phase-frequency detector with anti-backlash pulses, which prevent the mapping of very short correction pulses occurring on the basis of small phase differences by use of an AND logic circuit controlling the RESET of two flip flop circuits, a waste time is shortened by reducing a duration of the RESET pulse. The integrable phase-frequency detector according to the invention can be used in fast digital phase-locked control loops, for example for tuners, frequency synthesizers in the field of mobile radio.read more
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Patent
Phase-locked loop integrated circuits having fast phase locking characteristics
TL;DR: In this article, a phase-locked loop (PLL) integrated circuit includes a voltage-controlled oscillator and a loop filter having first and second input terminals and an output terminal coupled to an input of the voltage controlled oscillator.
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Steve Meyers,Nathan Y. Moyal +1 more
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References
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Patent
Method for shaping a pulse width and circuit therefor
TL;DR: In this paper, a phase-frequency detector (12) is configured for operating at a high frequency, and a transition of a clock signal (this paper CLK) is detected by a first latch (52) and a signal UP is generated.
Patent
Linearized digital phase and frequency detector
TL;DR: In this article, the phase and frequency comparator is used to eliminate non-linearities which would otherwise be inherent in its transfer function and thereby degrade performance of phase-locked systems employing the comparator.
Patent
Digital phase comparator with improved sensitivity for small phase differences
TL;DR: In this paper, a digital phase comparator for eliminating the dead zone in the phase correction means of a phase locked loop is proposed, where the up and down output pulses at all times are greater than a predetermined time duration no matter how small the phase difference between comparator input signals.
Patent
Circuit and method of extending the linear range of a phase frequency detector
TL;DR: In this article, a phase detector with a first pair of flip-flops is used to detect the phase difference between an input frequency and a reference frequency, and a second pair of flips are used to increment and decrement a counter, which in turn controls additional current sources (78-88) in the charge pump.
Patent
Phase detection apparatus
TL;DR: In this article, the phase detector circuit balances the amount of charge provided to a phase-locked loop near the in-phase condition to improve linearization of phase detector, and the AND gate output is delayed in a second delay circuit to produce a delayed reset signal which resets both flip flops simultaneously and disables the charge pumps.