Patent
Digital sample rate converter architecture
Terry Lee Sculley,Xianggang Yu +1 more
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TLDR
In this article, a digital sample rate converter converts a digital input signal (Din) having a first sample rate (Fs_in) to a corresponding digital output signal Dout having a second sample rate(Fs_out).Abstract:
A digital sample rate converter converts a digital input signal (Din) having a first sample rate (Fs_in) to a corresponding digital output signal Dout having a second sample rate (Fs_out), wherein an upsampling circuit (3) upsamples the digital input signal (Din) by a factor of N and a feedback algorithm circuit (23A) receives a corresponding digital signal of the same sample rate (Fs_in*N) to produce a digital signal (X6) having a sample rate which is a second predetermined factor (M) times the second sample rate (Fs_out). That signal is filtered by a decimation filter (17) and then downsampled by a predetermined factor to produce the digital output signal (Dout) with the second sample rate (Fs_out).read more
Citations
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Low-complexity sampling rate conversion method and apparatus for audio processing
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Real-time sample rate converter having a non-polynomial convolution kernel
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TL;DR: In this article, a sample rate converter (SRC) is defined as a circuit that receives a first signal at a first sampling frequency and outputs a second signal, representative of the first signal, having a second sampling frequency.
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TL;DR: In this paper, a method of converting sampling conversion with a predetermined ratio between an input frequency (Fsin) and an output frequency (Fsout) is proposed, which is based on the B-spline interpolation.
References
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Book
Discrete-Time Signal Processing
TL;DR: In this paper, the authors provide a thorough treatment of the fundamental theorems and properties of discrete-time linear systems, filtering, sampling, and discrete time Fourier analysis.
Patent
Asynchronous sample rate converter
TL;DR: In this article, an asynchronous sample rate converter for converting a first sample rate in a signal to a second sample rate of the same signal is presented, where the signal is first provided as input to an interpolator which upsamples the signal to form a signal having sample rate UFs1 where the upsampling factor U is a variable that is directly related to the ratio Fs2/Fs1.
Patent
Asynchronous digital sample rate converter
TL;DR: In this paper, an asynchronous digital sample rate converter includes a random access memory for storing input data values and a read only memory to store a reduced set of interpolation filter coefficients, and an auto-centering scheme which is a first order closed loop system with a digital integrator fed by an approximation of the input to output sample rate ratio.
Patent
Digital-to-digital conversion using non-uniform sample rates
TL;DR: In this paper, a method and apparatus for digital-to-digital conversion using sigma-delta modulation of the temporal spacing between digital samples is presented, where the digital data is interpolated by fixed ratio and then decimated under control of a sigmdelta modulated frequency selection signal that represents, on average, the data rate of the incoming digital data stream.
Patent
Method and system for asynchronous sample rate conversion using a noise-shaped numerically control oscillator
Marcus W. May,C. Eric Seaberg +1 more
TL;DR: In this paper, an asynchronous sample rate conversion without the need for an analog PLL and with simplified circuitry such that no multipliers or DSP utilization is required is presented, where the generated clock is used to time an interpolation of digital data by an multiple X to produce an interpolated signal (DATA FsX ) having a time average rate equal to the over-sampling frequency but being synchronized with the system clock.