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Patent

Distributed digital conferencing system

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TLDR
In this paper, a modification of this technique is disclosed which uses a distributed structure such that the individual station ports, under local memory and processor control, operate to combine selected time slot samples into a conference sum unique to the station.
Abstract
In time division communication systems one conference technique is to have a processor combine those samples going to a particular station forming a conference having as many subcombinations as there are stations. This approach, while allowing individual station gain adjustment, suffers from its dependence upon a large number of logic operations for a given conference. A modification of this technique is disclosed which uses a distributed structure such that the individual station ports, under local memory and processor control, operate to combine selected time slot samples into a conference sum unique to the station. In this manner gain values may be assigned on an individual listener station basis while the logic processing for the conference is performed in parallel by the ports involved in the conference.

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Citations
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References
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Data transfer control apparatus and method

TL;DR: In this article, an improved data transfer apparatus and method is fabricated by multiplexing at least a portion of the address of the peripherals on the data bus and adopting identical control timing for the read and write cycles, setting up address and data information early within a cycle and synchronizing the output of such information on the output busses coupled to the peripheral.
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Time division digital communication system

TL;DR: In this paper, the authors present a time division digital communication system which does not require a common control unit for accomplishing interconnections, having a plurality of modular switching units, identical and each unit has its own port circuits to which subscriber lines and/or trunks may be connected, service circuits, a time slot interchange and a microprocessor control and timing unit.
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TL;DR: In this paper, multibit digital signals are coupled through a stored program controlled switching processor to randomly selectable locations of a second buffer store for transmission to corresponding respective different call destinations.
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TL;DR: In this article, the sum of message samples from one or more lines during a write-in cycle is subtracted from each message sample read out during the same time slot from the summation memory, so that a speaker hears an attenuated sidetone version of his own voice.
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Digital conference system

TL;DR: In this paper, a random access memory sequentially stores and periodically updates samples of the digital speaker signals and generates a series of listener output pulses in response to the memory address signals, and an accumulator additively stores selected groups of listeners output pulses and upon receiving an appropriate control signal generates a listener output signal.