Patent
Error protection apparatus
Reads0
Chats0
TLDR
A Reed-Solomon error-correcting apparatus as mentioned in this paper is a programmable error detector that performs encoding, error detection, syndrome generation, burst error trapping, and Chien searching.Abstract:
A Reed-Solomon error correcting apparatus is programmable to perform several distinct error correction functions, namely, encoding, error detection, syndrome generation, burst error trapping, and Chien searching. The apparatus essentially comprises a set of two t registers (30) where t is the number of errors to be corrected, a set of two t exclusive-OR gates (32), a set oftwottop multiplexers (34), a set of two t bottom multiplexers (36), a first set of two t Galois Field multipliers (S0-S19), a second set of two Galois Field multipliers (G0-G19), a feedback multiplexer (42), a lead exclusive-OR gate (40), an AND gate (46), t-1 ordered Chien exclusive-OR gates (52) and a controller (12).read more
Citations
More filters
Patent
High bandwidth reed-solomon encoding, decoding and error correcting circuit
TL;DR: A pipelined error correction circuit iteratively determines syndromes, error locator and evaluator equations, and error locations and associated error values for received Reed-Solomon code words.
Patent
Error-correcting encoder, error-correcting decoder and data transmitting system with error-correcting codes
TL;DR: In this paper, an error-correcting encoder and a decoder with a reduced number of shifts was proposed to encode/decode a plurality of information symbols in parallel, which enables a reduction in processing time.
Patent
Galois field arithmetic logic unit
Katsumi Murai,Makoto Usui +1 more
TL;DR: In this article, a Galois field arithmetic logic unit of a code error check/correct apparatus to be employed when recording/reproducing data on an optical disk is presented. But the present unit is limited to the case where the code system has a great code length and the degree of the error location polynomial associated with the long distance code is as high as d=17.
Patent
Error correction apparatus
TL;DR: In this article, an error correction apparatus for use in erasure correction and error correction in transmission paths of devices such as optical disk devices, upon receipt of input data of various formats.
Patent
Method and device for decoding burst error of reed-solomon code
TL;DR: In this paper, a method and device for decoding error correcting codes by which the position of a burst error can be calculated with an extremely small amount of calculation by calculating a syndrome Si (i=0,.., 2t-1) of t-multiple byte error correcting RS codes at a first step and calculating the (j) (j≤t) factors of an error position polynominal (Z)=1+σ1Z+..+σjZj, by using the syndrome Si at a second step.
References
More filters
Journal ArticleDOI
Architecture for VLSI Design of Reed-Solomon Decoders
TL;DR: In this correspondence the logic structure of a universal VLSI chip called the symbol-slice Reed-Solomon (RS) encoder chip is presented and it is shown that a (255, 223) RS encoder requiring around 40 discrete CMOS IC's may be replaced by anRS encoder consisting of four identical interconnected V LSI RS encoding chips.
Patent
Error correcting system
TL;DR: In this paper, double correction BCH codes are used to generate error locations σ1 and σ2 and error patterns e, and e2, respectively, using the elements of the Galois field GF(2m).
Patent
Decoding method and apparatus for bose-chaudhuri-hocquenghem codes
TL;DR: In this paper, a method and apparatus for decoding BCH codes is described, where a code word encoded in a t-error-correcting BCH code is first processed to obtain the power sum symmetric functions thereof, which are then recursively solved by the arithmetic operations of addition and multiplication to obtain a polynomial whose roots give the location of errors in the code word.
Proceedings ArticleDOI
High Speed Interleaved Reed-Solomon Error Detection and Correction System
Shirish Deodhar.,E. J. Weldon +1 more
TL;DR: This paper describes an error detection and correction system, based on an interleaved Reed-Solomon code, that is capable of correcting multiple burst errors, and achieves an increase in reliability of more than ten orders of magnitude.