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Patent

Flip-flop circuit

Tetsuya Uemura
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TLDR
The flip-flop circuit as discussed by the authors is a series circuit with a negative differential resistance element (NDR) and another NDR element that has a control terminal capable of controlling a value of an element's current.
Abstract: 
The flip-flop circuit includes: a series (8) circuit which has a negative differential resistance element (1) and another negative differential resistance element (2) that has a control terminal capable of controlling a value of an element current; a transfer gate (9); a latch circuit (10) which has negative differential resistance elements (4), (5) connected in series; and an inverter circuit (11) which has an FET (6) as a drive element and a negative differential resistance element (7) as a load element. With this, such a flip-flop can be obtained that when a clock signal (CLK) is applied to a power supply terminal DD1 of the series circuit (8) and a control terminal of the transfer gate (9) and an input signal (IN) is supplied to the control terminal of the negative differential resistance element (2), an output is placed at a terminal.

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Citations
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Negative differential resistance field effect transistor (ndr-fet) & circuits using the same

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TL;DR: In this paper, an improved negative differential resistance field effect transistor (NDR-FET) is proposed. But the NDR-fET is not suitable for memory cells, since it requires a single channel technology (i.e., instead of CMOS) and yet provides low power.
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References
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Patent

High-speed flip flop circuit with master latching circuit free from influence of slave latching circuit

Masao Akata
TL;DR: A flip flop circuit comprises a master latching circuit having a first transmission gate responsive to a clock signal and the complementary clock signal for transferring a data bit to a first positive feedback loop, and a slave latching circuits having a second transmitter and a second receiver responsive to both the clock and complementary clock signals and complementarily shifted between on and off states with respect to the first transmitter as mentioned in this paper.
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Koichi Maezawa
TL;DR: In this article, a semiconductor element having N-type negative resistance characteristics is connected in series to obtain a series circuit and the two ends of the series circuit serve as drive voltage terminals to which periodic drive voltages are applied.
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