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Patent

IC with digital and analog circuits and mixed signal I/O pins

TLDR
In this article, the I/O pins can be configured for digital or analog operation on the fly by using a processor-controlled configuration circuit to process either analog or digital circuits.
Abstract
An integrated circuit providing mixed signal processing. I/O pin interface circuits include logic gates and other circuits for processing digital and analog signals. Processor-controlled configuration circuits allow the various I/O pin interface circuits to process either analog or digital circuits. The I/O pins can be configured for digital or analog operation on the fly.

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Citations
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Patent

Programmable system on a chip

TL;DR: A programmable interconnect architecture includes programmable elements and interconnect conductors, such that inputs and outputs of the programmable logic block, the non-volatile memory block, analog sub-system, the analog input/output circuit block, and the digital input and output circuit block can be programmably coupled to one another.
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Programmable microcontroller architecture(mixed analog/digital)

TL;DR: In this article, a programmable array with both continuous time analog blocks and Switched Capacitor analog blocks are offered on a single chip along with programmable digital blocks, which can communicate together.
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Programmable system on a chip for power-supply voltage and current monitoring and control

TL;DR: A programmable system-on-a-chip integrated circuit (PASIC) as discussed by the authors is a type of device that includes a programmable logic block, at least one user nonvolatile memory block and voltage-measuring and control analog and digital circuits on a single semiconductor integrated circuit chip or a flip chip, face-to-face, or other multiple die configuration.
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Multiple use of microcontroller pad

TL;DR: In this paper, a circuit arrangement permits a microcontroller wirebond pad to be configured to be an analog or digital input or output, using any of a plurality of switching configurations.
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Programmable driver for an I/O pin of an integrated circuit

TL;DR: A pin interface for an integrated circuit as mentioned in this paper includes logic gates for processing digital signals and analog lines for carrying analog signals, and circuits for disabling the digital circuits when configured to carry analog signals.
References
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Patent

Programmable mixed-mode integrated circuit architecture

TL;DR: A programmable mixed-mode circuit (180) has both digital (215,217) and analog (120,120',120") circuit portions as mentioned in this paper, and the digital portion is provided by programmable digital logic while the analog portion has a variety of analog circuits, including voltage references (218), high-speed comparators (208,209) and circuits (80) that are selectively configurable to provide operational amplifier or comparator functions.
Patent

Realizing analog-to-digital converter on a digital programmable integrated circuit

TL;DR: In this paper, the analog-to-digital converter (ADC) is realized in a field programmable gate array (FPGA) without adding special dedicated analog circuitry, and the analog comparator in an interface cell of the FPGA compares an incoming digital signal to a reference voltage.
Patent

Mixed mode analog/digital programmable interconnect architecture

TL;DR: In this article, a user-programmable integrated circuit includes an analog component containing user-configurable analog circuit modules, a digital component consisting of user configurable digital circuit modules and an interface portion containing userconfigurable interface circuits for conversion of signals from analog to digital and from digital to analog.
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Flexible, programmable cell array interconnected by a programmable switch matrix

TL;DR: In this article, a high density segmented programmable array logic device utilizes a switch interconnection matrix to couple an array of programmable logic cells, including programmable input, output, and buried state macrocells.
Patent

Switched drivers providing backmatch impedance for circuit test systems

TL;DR: In this article, a driver circuit (10) for selecting particular values of backmatch impedance (Z) for a functional or in-circuit test system is presented. But the back-match impedance is not connected to the transmission line.