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Information processing system having free field storage for nested processes

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TLDR
In this paper, the authors describe an information processing system employing plural processors which system is provided with a free field storage array to accommodate operands and data segments of any size and format.
Abstract
This disclosure relates to an information processing system employing plural processors which system is provided with a free field storage array to accommodate operands and data segments of any size and format. Each of the respective memory storage units is, in fact, structure oriented. However, pairs of such storage units are provided with isolation units having the capability of extracting and inserting fields of information independent of the memory structure. During a fetching operation, the isolation unit is adapted to fetch two contiguous parallel words and a shifting network or barrel switch is provided to position the desired field for transfer to the requesting device. During a store operation, the shifting network or barrel switch is employed to position incoming data into the proper bit location of the memory. The selected field is determined by the starting bit and the length field information provided by the memory control word and also by the type of operation requested. Each of the requesting devices is provided with its own interface unit that contains logic to construct a memory control word for each memory module involved in a fetch or store operation. In this manner, the entire array of memory units will appear to each of the requesting devices as being free field or without structure.

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References
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Means for limiting field length of computed data

TL;DR: In this article, a limit register is loaded with any desired number representing the desired number of fields of the resultant data, while the counter is incremented as each field of resultant data is produced by the processor.
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