Patent
Manufacture of semiconductor device
Reads0
Chats0
TLDR
In this article, a method was proposed to fuse the excellent bump electrodes on a number of Zener diodes in a short time for the subject semiconductor decice by a method wherein the bump electrode is formed by applying forward voltage at a P-N junction, and a part of the bump is fused by applying reverse voltage which is lower than breakdown voltage.Abstract:
PURPOSE:To from the excellent bump electrodes on a number of Zener diodes in a short time for the subject semiconductor decice by a method wherein the bump electrode is formed by applying forward voltage at a P-N junction, and a part of the bump is fused by applying reverse voltage which is lower than breakdown voltage CONSTITUTION:For example, a number of windows are provided on the oxide film 4 formed on an N type Si 1, and after a P type diffusion layer 2 has been formed, an Au electrode 6 and a back face electrode 8 are provided on the the layer 2, and a wafer 100 whereon a number of Zener diodes are provided is formed This wafer and a silver electrode 11 are soaked in a plating solution, a power source 12 is connected, the above is silver-plated by applying forward voltage, which is higher than threshold voltage, to the P-N junction and the bump electrode 7 is formed Then, a power source 16 is switched on, the reverse voltage which is lower than the Zener voltage at the P-N junction is applied, and the abnormal bump 7a formed on the defective junction 3a is fused to the extent with which there will be on difficulty for performance of a characteristic inspection Thus, an excellent bump electrode 3 can be formed in a short time for the Zener diode having low Zener voltageread more
Citations
More filters
Patent
Method for manufacturing SOI substrate
TL;DR: In this paper, an SOI substrate in bonding a semiconductor substrate and a base substrate to each other was used to improve the bonding strength and reliability of SOI substrates, even when an insulating film containing nitrogen was used as a bonding layer.
Patent
Semiconductor Integrated Circuit Device
TL;DR: In this article, a low-voltage control without largely increasing the circuit layout area in a low power consumption structure is presented. But the authors focus on the case of low-speed control, where the region operates on voltages between a power supply voltage and a virtual reference potential.
Patent
Method of making high speed semiconductor device having a silicon-on-insulator structure
TL;DR: In this article, a CMOS silicon-on-insulation structure is fabricated by first forming an insulating SiO 2 layer on a silicon substrate having a (110) plane.
Patent
Method for interconnection of integrated circuit chip and substrate
TL;DR: In this article, a method and structure for flip-chip interconnection of an integrated circuit chip to a substrate is provided, which overcome the problems associated with interconnecting the chip to the substrate by wirebonding and are less expensive than prior art flip chip interconnection methods and structures.